Manualshelf

Datasheet

ManualsBrandsANALOG DEVICES ManualsDev KitsPCB design board
12345678
CN-0267 Circuit Note
Rev. B | Page 6 of 8
The results are shown in Table 2 and were measured at the
following conditions:
• REG
OUT
= 3.3 V
• ADuCM360 M3 core clock = 2 MHz
• Both ADCs converting at 50 samples per second
• ADC0 has both buffers on and gain = 8
• ADC1 has both buffers on and gain = 16
• RTD excitation current = 200 µA
• SPI communicating to AD5421 with serial clock = 100 kHz
• HART communicating
The circuit with all relevant analog and digital blocks, including
the input sensor, consumes power supply current within the
budget allowed at the minimum 4 mA loop current.
Table 2. Power Supply Current from AD5421, REG
OUT
= 3.3V
Input Sensor
Voltage T5 to T6
Maximum (mV)
Current REG
OUT
Maximum (mA)
None 24.4 2.44
24PCDFA6D (5 kΩ,
0.66 mA at 3.3 V)
31.0 3.10
In the second method for assessing the circuit power consumption,
the circuit was verified to function as expected with the analog
output current set to the minimum of 4 mA while performing
HART communication. The result showed that the circuit
delivered the 4 mA current and showed no distortion of the
HART output signal.
Primary Sensor Input Performance
The ADuCM360 integrates most of the analog front-end on chip;
therefore, the performance of the analog input is primarily
determined by the specifications of the ADuCM360.
The level of noise is the main factor that can be influenced by
the interaction of the analog front-end with the rest of the
circuitry on the board. Thus, tests were carried out to focus on
the noise and related resolution performance of the system.
The demonstration was configured to transmit data from the
primary analog input, expressed as pressure in kPa, over the
HART communication. One hundred samples were captured,
and a basic data analysis to quantify the performance was
completed. Two of the tests involved the following:
• The first test was performed with a standard pressure sensor
(Honeywell 24PCDFA6D) soldered directly on the board.
• A second test was performed with the primary input signal
generated by a set of fixed and variable resistors, as shown
in Figure 7.
Figure 7. Primary Input Signal Generated by a Set of Resistors