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Circuit Note

CN-0267

Circuits from the Lab™ reference circuits are engineered and

tested for quick and easy system integration to help solve today’s

analog, mixed-signal, and RF design challenges. For more

information and/or support, visit www.analog.com/CN0267.

Devices Connected/Referenced

ADuCM360

Low Power, Precision Analog

Microcontroller

AD5421

16-Bit, Loop Powered, 4 mA to 20 mA

DAC

AD5700

Low Power HART Modem

Complete 4 mA to 20 mA Loop Powered Field Instrument with HART Interface

Rev. B

Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices

engineers. Standard engineering practices have been employed in the design and construction of

each circuit, and their function and performance have been tested and verified in a lab environment at

room temperature. However, you are solely responsible for testing the circuit and determining its

suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices

be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause

whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

EVALUATION AND DESIGN SUPPORT

Circuit Evaluation Board

CN0267 Circuit Evaluation Board (DEMO-AD5700D2Z)

Design and Integration Files

Schematics, Layout Files, Bill of Materials, Code Example

CIRCUIT FUNCTION AND BENEFITS

The circuit shown in Figure 1 is a complete smart industrial,

loop powered field instrument with 4 mA to 20 mA analog output

and a highway addressable remote transducer (HART®) interface.

HART is a digital 2-way communication in which a 1 mA peak-

to-peak frequency-shift-keyed (FSK) signal is modulated on top

of the standard 4 mA to 20 mA analog current signal. This allows

features such as remote calibration, fault interrogation, and

transmission of process variables, which are necessary in

applications such as temperature and pressure control.

This circuit has been compliance tested, verified, and registered by

the HART Communication Foundation (HCF). This successful

registration provides circuit designers with a high level of

confidence using one or all of the components in the circuit.

The circuit uses the ADuCM360, an ultralow power, precision

analog microcontroller, the AD5421, a 16-bit, 4 mA to 20 mA,

loop powered digital-to-analog converter (DAC), and the AD5700,

the industry’s lowest power and smallest footprint HART-

compliant IC modem.

Figure 1. 4 mA to 20 mA, Loop Powered Field Instrument with HART Interface (Simplified Schematic: All Connections and Decoupling Not Shown)

50Ω

DAC

LOOP–

HART_OUT

ADC_IP

DVDD

COM

D5421

ADuCM360

REG

PRIMARY

SENSOR

SECONDARY

SENSOR

AD5700

ADC

LOOP

TEMPERATURE

SENSOR

REF

IOVDD

XTAL1

CORTEX

SRAM

FLASH

DMA

UART

SPI

CLOCK

RESET

WATCHDOG

EXC

WATCHDOG

TIMER

REG

OUT

20MΩ

1MΩ

4700pF

1.6Ω

10µF10µF

470Ω

1µF

L* L*

TVS

40V

LOW

LEAKAGE

4.7V

LOW LEAKAGE

10Ω

10µF10µF

1.2MΩ

300pF

150pF

150kΩ

0.068µF

0.22µF

1µF

SCLK

SDO

SDIN

SYNC

AIN4

AIN0

AIN3

AIN2

0.1µF

0.01µF

0.1µF

AIN7

1kΩ 1kΩ

1kΩ

0.1µF

1kΩ

0.1µF

0.01µF

AIN1

GND_SW

AVDD

ADC1

RXD

TXD

RTS

SCLK0

MISO0

MOSI0

CS0

SIN

P0.5

SOUT

LDAC

XTAL2

3.8664MHz

1µF

REG_CAP

AGNDDGND

EXPOSED

PADAGND

DGND

AGND

0.47µF

DVDD_

REG

AVDD_

REG

VREF–

VREF+

PT100

VREF

0.47µF

0.1µF

10µF

REFOUT1

REFOUT2

P0.4

ADC0

RREF

5.62kΩ

10ppm

SPI INTERFACE

UART INTERFACE

LOOP+

LOOP–

NOTES

1. L* = FERRITE BEAD, 0.3Ω @ DC, 1kΩ @ 100MHz.

2. THE ADuCM360 EXPOSED PAD IS CONNECTED TO DGND.

VREF

DVDD

VOLTAGE

REGULATOR

10551-001

Summary of content (8 pages)

PAGE 1
Circuit Note CN-0267 Devices Connected/Referenced Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0267.
PAGE 2
CN-0267 Circuit Note CIRCUIT DESCRIPTION Digital Data Processing, Algorithm, and Communications Analog Front-End Interface All the field instrument digital functions are provided by the ADuCM360 32-bit ARM Cortex™ M3 RISC processor, with integrated 128 k bytes of nonvolatile flash/EE memory, 8 k bytes of SRAM, and an 11-channel direct memory access (DMA) controller that supports wired (2× SPI, UART, I²C) communication peripherals.
PAGE 3
Circuit Note CN-0267 Output Protection A transient voltage suppressor (TVS) protects the 4 mA to 20 mA HART interface from overvoltage. Its voltage rating should prevent exceeding the AD5421 absolute maximum voltage of 60 V on the REGIN pin. Note that the TVS leakage current can affect the current output accuracy; therefore, pay attention to the leakage current at a given loop voltage and temperature range when selecting this component.
PAGE 4
CN-0267 Circuit Note The AD5421 can be connected via the protection directly to the loop. Alternatively, a depletion mode N-channel MOSFET can be connected between the AD5421 and the loop power supply, as shown in Figure 2. The use of the additional MOSEFT in this configuration keeps the voltage drop across the AD5421 at approximately 12 V, lowers the power dissipated in the AD5421 package, and therefore improves the 4 mA to 20 mA analog output accuracy.
PAGE 5
Circuit Note CN-0267 When a HART device is not transmitting (silence), do not couple noise onto the network. Excessive noise may interfere with reception of HART signals by the device itself or other devices on the network. The voltage noise measured across a 500 Ω load in the loop must contain no more than 2.2 mV rms of combined broadband and correlated noise in the HART extended frequency band. In addition, the noise should not exceed 138 mV rms outside the HART extended frequency band.
PAGE 6
CN-0267 Circuit Note The results are shown in Table 2 and were measured at the following conditions: • • • • • • • • REGOUT = 3.
PAGE 7
Circuit Note CN-0267 Secondary Sensor Input Performance The performance summary can be seen in Table 3, and the signal plots are shown in Figure 8 and Figure 9. Table 3. Primary Sensor Input Noise and Resolution Pressure Sensor 207 kPa 1.3 Pa 6.8 Pa 17.2 bit 14.9 bit Parameter Full Scale Noise RMS Peak-to-Peak Noise Resolution Effective (rms) Noise-Free Resolution (p-p) Resistive Network 246 kPa 0.68 Pa 3.6 Pa 18.5 bit 16.
PAGE 8
CN-0267 Circuit Note LEARN MORE Data Sheets and Evaluation Boards CN-0267 Design Support Package: http://www.analog.