Datasheet

DAC8426
–8–
REV. C
a) Large Signal
b) Settling Time Response (Negative Transition)
c) Settling Time Response (Positive Transition)
Figure 3. Dynamic Response
The outputs can withstand an indefinite short-circuit to AGND
to typically 50 mA. The output may also be shorted to any volt-
age between V
DD
and V
SS
; however, care must be taken to not
exceed the device maximum power dissipation.
The amplifier’s emitter follower output stage consists of an in-
trinsic NPN bipolar transistor with a 400 µA NMOS pull-down
current-source load connected to V
SS
. This circuit configuration
shown in Figure 4 enables the output amplifier to develop out-
put voltages very close to AGND. Only the negative supply of the
four output buffer amplifiers are connected to V
SS
. Operating
the DAC8426 from dual supplies (V
DD
= +15 V and V
SS
= –5 V)
improves negative going output settling time near zero volts.
When operating single supply (V
DD
= +15 V and V
SS
= 0 V) the
output sink current decreases as the output approaches zero
voltage. Within 200 mV of AGND (single-supply operation) the
internal sinking capability appears resistive at a value of approxi-
mately 1200 Ω. The buffer amplifier output current and voltage
characteristics are plotted in Figure 5.
Test Conditions, All Photos:
V
DD
= +15 V
C
REF
OUT = 10 mF
R
L
= 2 kV
Digital Input Sequence 0, 255, 0