Datasheet

Data Sheet DAC8412/DAC8413
Rev. G | Page 5 of 20
Parameter Symbol Conditions Min Typ Max Units
Write Data Setup t
WDS
t
WCS
= 150 ns 20 ns
Write Data Hold t
WDH
t
WCS
= 150 ns 0 ns
Load Data Pulse Width t
LDW
180 ns
Reset Pulse Width t
RESET
150 ns
Chip Select Read Pulse Width t
RCS
170 ns
Read Data Hold t
RDH
t
RCS
= 170 ns 20 ns
Read Data Setup t
RDS
t
RCS
= 170 ns 0 ns
Data to High-Z t
DZ
C
L
= 10 pF 200 ns
Chip Select to Data t
CSD
C
L
= 100 pF 320 ns
SUPPLY CHARACTERISTICS
Power Supply Sensitivity PSS 100 ppm/V
Positive Supply Current I
DD
7 12 mA
Negative Supply Current I
SS
V
SS
= −5.0 V −10 mA
Power Dissipation P
DISS
V
SS
= 0 V 60 mW
V
SS
= −5.0 V 110 mW
1
All supplies can be varied ±5%, and operation is guaranteed. Device is tested with V
DD
= 4.75 V.
2
For single-supply operation only (V
REFL
= 0.0 V, V
SS
= 0.0 V). Due to internal offset errors, INL and DNL are measured beginning at 0x005.
3
Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.
4
All parameters are guaranteed by design.
5
All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
CS
A
0/A1
t
RDS
t
RCS
t
RDH
t
AS
t
AH
t
DZ
t
CSD
R/W
DATA
OUT
DATA VALID
HIGH-Z HIGH-Z
00274-003
Figure 3. Data Output (Read Timing)
A0/A1
RESET
LDAC
t
WCS
R/W
CS
DATA IN
t
WS
t
WH
t
AS
t
AH
t
LS
t
LH
t
WDH
t
WDS
t
LDW
t
RESET
00274-004
Figure 4. Data Write (Input and Output Registers) Timing