Datasheet

Data Sheet DAC8412/DAC8413
Rev. G | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
DD
= +15.0 V, V
SS
= −15.0 V, V
LOGIC
= +5.0 V, V
REFH
= +10.0 V, V
REFL
= −10.0 V,−40°C ≤ T
A
≤ +85°C, unless otherwise noted.
1
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
ACCURACY
Integral Nonlinearity Error INL E grade ±0.25 ±0.5 LSB
F grade ±1 LSB
Differential Nonlinearity Error DNL Monotonic over temperature −1 LSB
Min-Scale Error V
ZSE
R
L
= 2 kΩ ±2 LSB
Full-Scale Error V
FSE
R
L
= 2 kΩ ±2 LSB
Min-Scale Temperature Coefficient TCV
ZSE
R
L
= 2 kΩ 15 ppm/°C
Full-Scale Temperature Coefficient TCV
FSE
R
L
= 2 kΩ 20 ppm/°C
Linearity Matching Adjacent DAC Matching ±1 LSB
REFERENCE
Positive Reference Input Voltage Range
2
V
REFL
+ 2.5 V
DD
− 2.5 V
Negative Reference Input Voltage Range
2
−10
V
REFH
− 2.5
V
Reference High Input Current I
REFH
−2.75 +1.5 +2.75 mA
Reference Low Input Current I
REFL
−2.75 −2 0 mA
Large Signal Bandwidth BW −3 dB, V
REFH
= 0 V to 10 V p-p 160 kHz
AMPLIFIER CHARACTERISTICS
Output Current I
OUT
R
L
= 2 kΩ, C
L
= 100 pF –5 +5 mA
Settling Time t
S
To 0.01%, 10 V step, R
L
= 1 kΩ 10 μs
Slew Rate SR 10% to 90% 2.2 V/μs
Analog Crosstalk 72 dB
LOGIC CHARACTERISTICS
Logic Input High Voltage V
INH
T
A
= 25°C 2.4 V
Logic Input Low Voltage
V
INL
T
A
= 25°C
0.8
V
Logic Output High Voltage V
OH
I
OH
= 0.4 mA 2.4 V
Logic Output Low Voltage V
OL
I
OL
= −1.6 mA 0.4 V
Logic Input Current I
IN
1 μA
Input Capacitance C
IN
8 pF
Digital Feedthrough
3
V
REFH
= 2.5 V, V
REFL
= 0 V 5 nV-sec
LOGIC TIMING CHARACTERISTICS
3, 4
Chip Select Write Pulse Width t
WCS
80 ns
Write Setup t
WS
t
WCS
= 80 ns 0 ns
Write Hold t
WH
t
WCS
= 80 ns 0 ns
Address Setup t
AS
0 ns
Address Hold t
AH
0 ns
Load Setup t
LS
70 ns
Load Hold t
LH
30 ns
Write Data Setup
t
WDS
t
WCS
= 80 ns
20
ns
Write Data Hold t
WDH
t
WCS
= 80 ns 0 ns
Load Data Pulse Width t
LDW
170 ns
Reset Pulse Width t
RESET
140 ns
Chip Select Read Pulse Width t
RCS
130 ns
Read Data Hold t
RDH
t
RCS
= 130 ns 0 ns
Read Data Setup t
RDS
t
RCS
= 130 ns 0 ns
Data to High-Z t
DZ
C
L
= 10 pF 200 ns
Chip Select to Data t
CSD
C
L
= 100 pF 160 ns