User manual

INDEX
I-2 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
connectors
diagram of locations, 2-20
J1-3 (expansion), 2-3, 2-8, 2-22
J5 and J11 (CAN), 2-21
J6 (RS-232), 2-21
J7 (power), 2-22
J9-10 (audio), 2-21
P10 (TWI), 2-24
P11 (timers), 2-24
P12 (UART1), 2-25
P3 (SPORT1), 2-4
P4 (SPORT2), 2-4
P6 (SPORT0), 1-13, 2-4, 2-23
P8 (PPI), 2-23
P9 (SPI), 2-4, 2-24
SPORT0-1 (P6-7), 2-23
ZP4 (JTAG), 2-9, 2-23
contents, of this EZ-KIT Lite package, 1-3
Controller Area Network, See CAN
core voltage, 2-2
CTS signals, 2-10
customer support,
xv
D
DAC1-0 signals, 2-15
data acquisition (DAQ) device, 1-12
DB9 (UART) connector,
xii, 2-8
default configuration, of this EZ-KIT Lite, 1-3
DIP switch (SW5), 1-4, 1-13
DR0PRI signals, 2-12
DR2PRI signal, 2-6
DR2SEC signal, 2-6
DR3PRI signal, 2-6
DR3SEC signal, 2-6
DT2PRI signal, 2-6
DT2SEC signal, 2-6
DT3PRI signal, 2-6
DT3SEC signal, 2-6
E
EBIU_SDBCTL register, 1-9, 1-10
EBIU_SDGCTL register, 1-9, 1-10
EBIU_SDRRC register, 1-9, 1-10
EBUI control signals, 2-8
Educational Laboratory Virtual
Instrumentation Suite interface, See ELVIS
ELVIS
interface,
xi, 1-12, 2-14
select jumper (JP8), 2-16
voltage select jumper (JP6), 2-16
ELVIS_PF1-2 signals, 2-5
ELVIS_PF5-7 signals, 2-5
EN (enable control input) signals, 2-10
ERR signals, 1-11, 2-6, 2-10
example programs, 1-14
expansion interface
connections, 1-13, 2-3, 2-4, 2-11
connectors (J1-3), 2-8, 2-22
external bus interface unit (EBIU), 2-3
external memory, 1-8, 2-3, 2-9
F
FCE enable switch (SW14), 2-12
features, of this EZ-KIT Lite,
xi
flag pins, See programmable flags
flash memory
boot mode, 2-13
connections, 2-3
enable switch (SW6), 1-10, 2-11
frame sync signals, 1-13
frequency, 1-9
FS loopback signal, 2-13
FUNCT_OUT signal, 2-15
G
general-purpose IO pins, 1-13, 2-10, 2-11, 2-19
GND signal, 2-8