Datasheet
AMP04
–5–
Parameter Symbol Conditions Limit Unit
G = 1000 80 dB min
Power Supply Rejection PSRR 4.0 V ≤ V
S
≤ 12 V
G = 1 85 dB min
G = 10 95 dB min
G = 100 95 dB min
G = 1000 95 dB min
GAIN (G = 100 K/R
GAIN
)
Gain Equation Accuracy G = 1 to 100 0.75 % max
OUTPUT
Output Voltage Swing High V
OH
R
L
= 2 kΩ 4.0 V min
Output Voltage Swing Low V
OL
R
L
= 2 kΩ 2.5 mV max
POWER SUPPLY
Supply Current I
SY
V
S
= ±15 900 µA max
700 µA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .± 18 V
Common-Mode Input Voltage
2
. . . . . . . . . . . . . . . . . . . ±18 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AMP04E, F . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Package Type
JA
3
JC
Unit
103 43 °C/W
8-Lead Plastic DIP (P)
8-Lead SOIC (S)
158 43 °C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
3
θ
JA
is specified for the worst case conditions, i.e., θ
JA
is specified for device in
socket for a P-DIP package; θ
JA
is specified for device soldered in circuit board
for SOIC package.
DICE CHARACTERISTICS
R
GAIN
1
R
GAIN
8
7 V+
6 V
OUT
5 REF
–IN 2
+IN 3
V– 4
AMP04 Die Size 0.075
×
0.99 inch, 7,425 sq. mils.
Substrate (Die Backside) Is Connected to V+.
Transistor Count, 81.
REV. C
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