Datasheet

Application Note AN-1006
Rev. A | Page 9 of 16
LEDS
The LEDs provide feedback to the user about the status of the
Cypress USB microcontroller.
D2
BLUE CLEAR
D1
YELLOW CLEAR
D3
YELLOW CLEAR
R7
475R
475R
475R
R8
R9
2
3
1
5
4
U4
FXLP34P5X
2
3
1
5
4
U5
FXLP34P5X
2
1
5
4
3
U6
FXLP34P5X
3V3DD
3V3DD
3V3DD
3V3DD
IOVDD
IOVDD
TO U3
IOVDD
A
GND
VCCY
VCCA
Y
A
GND
VCCY
VCCA
Y
D
A
A
GN
VCCY
VCC
Y
5V0DD
D4
R10
475R
RED DIFFUSED
0
8093-022
Figure 22. LEDs Schematic
Table 1. LED Functions
Reference
Designator Color Functionality
D1 Yellow I
2
C mode is active
D2 Blue GPIO LED, for firmware debug purposes
D3 Yellow SPI mode is active
D4 Red 5 V power being is supplied over the USB bus
EEPROM
The EEPROM is an important system element that identifies
the board to the host PC and stores the firmware for the
Cypress USB Interface. The EEPROM is programmed during
manufacturing via the J2 connector.
1
A0
2
A1
3
A2
4
GND
8
VCC
7
WP
6
SCL
5
SDA
U1
24AA256-I/ST
C3
0.10uF
1
2
3
J2
R3
10k0
R4
10k0
IOVDD
SCL
SDA
8093-023
0
Figure 23. EEPROM Schematic
TARGET BOARD POWER SWITCH
The USBi is capable of supplying power to the target board after
the Cypress USB microcontroller has finished its boot up process.
The USB_PWR_ON signal connects to the base of Q2 and turns
on both transistors when driven high.
This circuit also enables a software-controlled target reset from
SigmaStudio.
1
B
2
E
3
C
Q2
MMBT3904LT1G
1
B
2
C
3
E
4
C
Q1
FZT705TA
R12
100k
R11
2k00
R13
1k50
R14
10k0
5V0DD
5V0DD_USB
USB_PWR_ON
0
8093-024
LOCAL FOR ADG721
Figure 24. Target Power Switch Schematic
TARGET BOARD PROGRAMMING HEADER
To properly boot the Cypress USB microcontroller from the
EEPROM, it is necessary to remove all other devices from the
I
2
C bus. The ADG721BRMZ analog switch remains open,
isolating the I
2
C bus from the target, until the boot process has
completed.
1
3
5
7
9
2
4
6
8
10
11
13
12
14
2X5 CUSTOM RIBBON
J1
5V0DD_USB
CTRL
CTRL
S1
IN1
D1
U2-A
ADG721BRMZ
S2
IN2
D2
U2-B
ADG721BRMZ
C2
0.10uF
SCL
SDA
CDATA
CLATCH1
CCLK
BRD_RESET
COUT
USB_CLK
CLATCH2
CLATCH3
CLATCH4
CLATCH5
U
SB_PWR_ON
USB_PWR_ON
3V3DD
8093-025
0
Figure 25. Target Board Programming Header Schematic