Datasheet
DSP DDR2 Interface
1/5/12 16
A0269-2011
ADSP-BF609 EZ-Board
1.0
2
D
4
3
2
1
A B C
20 Cotton Road
Nashua, NH 03063
A B C D
4
3
2
1
PH: 1-800-ANALOGD
C
Title
Size Board No.
Date Sheet of
DEVICES
ANALOG
Rev
R6
0
0402
0402
R3
1.0K
C2
0.01UF
0402
C9
0.01UF
0402
C3
0.01UF
0402
C18
0.1UF
0402
R2
1.0K
0402
R4
100.0
0402
C4
0.01UF
0402
C5
0.01UF
0402
C6
0.01UF
0402
C7
0.01UF
0402
C8
0.01UF
0402
C10
0.01UF
0402
C11
0.01UF
0402
C12
0.01UF
0402
C13
0.01UF
0402
C14
0.01UF
0402
C15
0.01UF
0402
C17
0.1UF
0402
C16
10UF
0805
RN8
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
0
RN3
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
0
RN13
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
RN10
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
RN11
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
RN6
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
RN7
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
0
RN2
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
C1
0.01UF
0402
C84
0402
0.1UF
0
RN12
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
0
RN5
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
0
RN4
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
U37
MT47H64M16
FBGA84
K3
A8
K7
E8
L8
K8L7
J2
G7
G3
G1
E9
C9
C7
C3
C1
G9
A9
J1
R1
M9
J9
E1
A1
B7
B3
R7
R3
R8
K9 E2
A2
F7
F3
H2
F8
F2
E7
D8
D2
B8
B2
H8
A7
J7
P9
N1
J3
E3
A3
C2
C8
F9
F1
H9
H1
H3
H7
B9
B1
D9
D1
D3
D7
G2
G8
K2
J8
L1
L3
L2
P3
P8
P2
N7
N3
N8
N2
M7
R2
P7
M2
M3
M8
A0
A1
A10/AP
A11
A12
A2
A3
A4
A5
A6
A7
A8
A9
BA0
BA1
BA2
CK
CKE
DQ0
DQ1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
GND1
GND2
GND3
GND4
GND5
GNDL
GNDQ1
GNDQ10
GNDQ2
GNDQ3
GNDQ4
GNDQ5
GNDQ6
GNDQ7
GNDQ8
GNDQ9
LDM
LDQS
NC1
NC2ODT
RFU/A13
RFU/A14
RFU/A15
UDM
UDQS
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VDDQ1
VDDQ10
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VREF
CAS CK
CS
LDQS
RAS
UDQS
WE
R5
0
0402
U1
ADSP-BF609
BGA349C80P22X22_1900X1900
L19
R20
V20
R21
J20
H20
N20
P20
E20
F20
L20
M20
K20
G20
G22
G21
K21
K22
F22
H21
E21
J22
J21
E22
H22
F21
M21
M22
P21
N22
N21
P22
L21
L22
Y21
U22
Y22
T20
W20
U21
W21
T21
W22
U20
R22
V22
T22
V21
DMC0_A13
DMC0_A12
DMC0_A11
DMC0_A10
DMC0_A09
DMC0_A08
DMC0_A07
DMC0_A06
DMC0_A05
DMC0_A04
DMC0_A03
DMC0_A02
DMC0_A01
DMC0_A00
DMC0_DQ07
DMC0_DQ06
DMC0_DQ05
DMC0_DQ04
DMC0_DQ03
DMC0_DQ02
DMC0_DQ01
DMC0_DQ00
DMC0_DQ15
DMC0_DQ14
DMC0_DQ13
DMC0_DQ12
DMC0_DQ11
DMC0_DQ10
DMC0_DQ09
DMC0_DQ08
DMC0_LDQS
DMC0_LDQS
DMC0_UDQS
DMC0_UDQS
DMC0_UDM
DMC0_LDM
DMC0_CK
DMC0_CK
DMC0_CS0
DMC0_CAS
DMC0_CKE
DMC0_WE
DMC0_RAS
DMC0_ODT
DMC0_BA0
DMC0_BA1
DMC0_BA2
VREF_DMC
0
RN1
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
RN9
0
RNS005
3
4
2
1 8
7
6
5
R4B
R3B
R2B
R1BR1A
R2A
R4A
R3A
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
DMC0_DQ04_Z
DMC0_DQ04_Z
DMC0_ODT
DMC0_ODT
DMC0_CS0
DMC0_CS0
DMC0_UDM
DMC0_UDM
DMC0_LDM
DMC0_LDM
DMC0_CK
DMC0_CK
DMC0_RAS
DMC0_RAS
DMC0_CK
DMC0_CK
DMC0_CAS
DMC0_CAS
DMC0_WE
DMC0_WE
DMC0_CKE
DMC0_CKE
DMC0_A13
DMC0_A13
DMC0_A10
DMC0_A10
DMC0_A09
DMC0_A09
DMC0_A08
DMC0_A08
DMC0_A07
DMC0_A07
DMC0_A05
DMC0_A05
DMC0_A03
DMC0_A03
DMC0_A02
DMC0_A02
DMC0_A01
DMC0_A01
DMC0_A00
DMC0_A00
DMC0_BA0
DMC0_BA0
DMC0_DQ05
DMC0_DQ05
DMC0_DQ04
DMC0_DQ04
DMC0_DQ03
DMC0_DQ03
DMC0_DQ02
DMC0_DQ02
DMC0_DQ01
DMC0_DQ01
DMC0_DQ00
DMC0_DQ00
DMC0_DQ15
DMC0_DQ15
DMC0_DQ12
DMC0_DQ12
DMC0_DQ13
DMC0_DQ13
DMC0_DQ14
DMC0_DQ14
DMC0_BA1
DMC0_BA1
DMC0_BA2
DMC0_BA2
DMC0_A11
DMC0_A11
DMC0_DQ07
DMC0_DQ07
DMC0_DQ06
DMC0_DQ06
DMC0_DQ11
DMC0_DQ11
DMC0_DQ10
DMC0_DQ10
DMC0_DQ09
DMC0_DQ09
DMC0_DQ08
DMC0_DQ08
DMC0_UDQS
DMC0_UDQS
DMC0_UDQS
DMC0_UDQS
DMC0_A12
DMC0_A12
DMC0_A06
DMC0_A06
DMC0_A04
DMC0_A04
DMC0_LDQS
DMC0_LDQS
DMC0_LDQS
DMC0_LDQS
DMC0_CS0_Z
DMC0_CS0_Z
DMC0_BA2_Z
DMC0_BA2_Z
DMC0_BA1_Z
DMC0_BA1_Z
DMC0_BA0_Z
DMC0_BA0_Z
DMC0_A09_Z
DMC0_A09_Z
DMC0_A08_Z
DMC0_A08_Z
DMC0_A07_Z
DMC0_A07_Z
DMC0_A06_Z
DMC0_A06_Z
DMC0_A05_Z
DMC0_A05_Z
DMC0_A04_Z
DMC0_A04_Z
DMC0_A03_Z
DMC0_A03_Z
DMC0_A02_Z
DMC0_A02_Z
DMC0_A13_Z
DMC0_A13_Z
DMC0_A12_Z
DMC0_A12_Z
DMC0_A11_Z
DMC0_A11_Z
DMC0_A10_Z
DMC0_A10_Z
DMC0_A01_Z
DMC0_A01_Z
DMC0_A00_Z
DMC0_A00_Z
VREF_DMC
VREF_DMC
DMC0_WE_Z
DMC0_WE_Z
DMC0_RAS_Z
DMC0_RAS_Z
DMC0_UDQS_Z
DMC0_UDQS_Z
DMC0_CAS_Z
DMC0_CAS_Z
DMC0_ODT_Z
DMC0_ODT_Z
DMC0_UDQS_Z
DMC0_UDQS_Z
DMC0_LDQS_Z
DMC0_LDQS_Z
DMC0_UDM_Z
DMC0_UDM_Z
DMC0_LDM_Z
DMC0_LDM_Z
DMC0_DQ09_Z
DMC0_DQ09_Z
DMC0_DQ08_Z
DMC0_DQ08_Z
DMC0_DQ15_Z
DMC0_DQ15_Z
DMC0_DQ14_Z
DMC0_DQ14_Z
DMC0_DQ13_Z
DMC0_DQ13_Z
DMC0_DQ12_Z
DMC0_DQ12_Z
DMC0_DQ11_Z
DMC0_DQ11_Z
DMC0_DQ10_Z
DMC0_DQ10_Z
DMC0_CKE_Z
DMC0_CKE_Z
DMC0_DQ07_Z
DMC0_DQ07_Z
DMC0_DQ06_Z
DMC0_DQ06_Z
DMC0_DQ05_Z
DMC0_DQ05_Z
DMC0_DQ03_Z
DMC0_DQ03_Z
DMC0_DQ02_Z
DMC0_DQ02_Z
DMC0_DQ01_Z
DMC0_DQ01_Z
DMC0_DQ00_Z
DMC0_DQ00_Z
DMC0_LDQS_Z
DMC0_LDQS_Z
omitted since overall trace length is less than 2.5" for each net.
DDR2 end of line terminators and VTT tracking circuit have been
and any recommendations by the memory manufacturer.
For a custom design, please adhere to any EE-note from ADI
CLK termination at the memory