Datasheet

ADSP-BF609 EZ-KIT Lite Evaluation System Manual I-1
IINDEX
A
ADSP-BF609 Blackfin processor, xii
ADSP-BF609 processor memory map, 1-11
architecture, of this EZ-KIT Lite, 2-2
B
bill of materials, A-1
board schematic (ADSP-BF609), B-1
boot
modes, 2-19
mode select switch (SW2), 2-19
bus switch, 2-5
example, 2-6
C
CAN connector (J4), 2-27
CAN interface, 1-14
configuration, of this EZ-KIT Lite, 1-3
connectors, 2-24
diagram of locations, 2-24
J1 (ethernet), 2-27
J2 (DCE UART), 2-25
J3 and P8 (Link Port / JTAG), 2-25
J4 (CAN), 2-27
J5 (SD), 2-27
P16-17 (ethernet), 2-27
P18 (power), 2-26
P1A-C (expansion), 2-26
P1 (JTAG), 2-25
P2A (expansion), 2-26
P3A (expansion), 2-26
P7 (USB), 2-26
ZP1 (JTAG), 2-26
contents, of this EZ-KIT Lite package, 1-2
customer support, xvii
D
DCE UART connector (J2), 2-25
DDR2 SDRAM controller, 1-12
default configuration, of this EZ-KIT Lite, 1-3
default jumper and switch settings, 1-4
default processor interface availability, 2-7
design reference info, 1-22
E
EngineerZone, xviii
ethernet
connector (J1), 2-27
connectors (P16-17), 2-27
ethernet interface, 1-13
example programs, 1-22
expansion interface, 1-20, 2-26
F
FET switches, 2-4
example, 2-4