Datasheet

Software-Controlled Switches (SoftConfig)
2-16 ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Table 2-9. Output Signals of Microchip GPIO Expander (U47 Port A)
Bit Signal Name Description FET Processor Signal
(if applicable)
Component
Connected
Default
0
PHYINT_EN
1
Connects Ethernet 0
interrupt signal to
Ethernet PHY, con-
nected by default
U35 PD06/~ETH0_
PHYINT~/PPI1_
FS2/TM0_ACI5
U49 Low
1
PHY_PWR_DWN_INT
2
Controls power down
of the Ethernet PHY if
PHYINT_EN high
U49 High-Z
2
PHYAD0
3
Allows the PHY to be
placed in isolate mode
U49 High-Z
3
~ETHERNET_EN Disconnects EMAC0
signals from U49
U4/U5 Low
4
~WAKE_PUSHBUTTON_EN Enables push button
input to processor
U7 PE12/~ETH1_
PHYINT~/PWM1_
CL/RSI0_D5
U1 High
5
~PD0_SPI0D2_
EPPI1D16_SPI0SEL3_
EI3_EN
Connects processor sig-
nal to EI3 connectors,
disabled by default
U36 PD00/SPI0_
D2/PPI1_
D16/~SPI0_SEL3
EI3 High
6
~PD1_SPI0D3_
EPPI1D17_SPI0SEL2_
EI3_EN
Connects processor sig-
nal to EI3 connectors,
disabled by default
U51 PD01/SPI0_
D3/PPI1_
D17/~SPI0_SEL2
EI3 High
7
~PD2_SPI0MISO_EI3_
EN
Connects processor sig-
nal to EI3 connectors,
disabled by default
U57 PD02/SPI0_MISO EI3 High
1 This is an active low signal but the signal name does not show this.
2 This signal defaults to an input setting, putting the signal in High-Z. Must be used in concert with
PHYINT_EN. Set PHYINT_EN high first and then control PHY_PWR_DWN_INT.
3 This signal defaults to an input setting, putting the signal in High-Z. There is a 2.21k resistor pull-up,
which sets the PHY address appropriately. If isolate mode is desired, the signal needs to be set as an out-
put and driven appropriately.