Datasheet

ADSP-BF609 EZ-KIT Lite Evaluation System Manual 2-11
ADSP-BF609 EZ-KIT Lite Hardware Reference
U40, a 10-bit bus switch, controls the link port 1 connection to P8 (link
port connector), EI3 (expansion interface), and SMC address signals. The
default setting is high, which connects the SMC address bus to the parallel
flash memory and connects the link port pins PA8-15 and PB2-3 to the
expansion interface. The link port 1 can be selected by setting U46 signal
GPA1 low.
Table 2-5 and Table 2-6 show the output signals of the Microchip GPIO
expander (U45), with a TWI address of 0100 001X, where X represents the
read or write bit. The signals that control an individual FET have an entry
under the FET column. The Component Connected column shows the
board IC that is connected if the FET is enabled. Note that some of the
Microchip (U45) output signals are connected directly to components on
the board. However, in most cases, the Microchip (U45) is controlling the
enable signal of a FET switch. Also note that if a particular functionality
of the processor signal is being used, it will be in bold font under the “Pro-
cessor Signal” column.
Table 2-5. Output Signals of Microchip GPIO Expander
(U45 Port A)
Bit Signal Name Description FET Processor Signal
(if applicable)
Component
Connected
Default
0
CAN_EN Enable CAN IC, enabled by
default
U55 High
1
~CAN_STB CAN standby control input U55 High
2
~CAN0_ERR_EN GPIO PE02 for CAN0 error U33 PE02/SPI1_
RDY/PPI0_
D22/SPT1_ACLK
U55 High
3
~CAN0RX_EN CAN0RX connected to
CAN IC U55
U34 PG04/SPT2_
ACLK/TM0_
TMR1/
CAN0_
RX
/TM0_ACI2
U55 Low
4
~CNT0UD_EN Rotary counter 0 count up
connected to rotary connec-
tor
U30 PG11/SPT2_
BD1/TM0_
TMR6/CNT0_UD
SW9 Low