Datasheet

General-Purpose I/O (GPIO)
1-18 ADSP-BF609 EZ-KIT Lite Evaluation System Manual
The ports are used to interface gluelessly to other ADSP-BF609 processors
which also have the link ports pins brought out.
The EZ-KIT Lite enables access to link ports 0 and 1 (referred to as
LP0
and LP1 in schematics) via connectors P8 and J3, respectively. Two
ADSP-BF609 EZ-KIT Lites can mate gluelessly via the link port connec-
tors. The processors communicate via the link ports, all while performing
independent tasks on each of the EZ-KIT Lite. To loopback the link port
connectors on one EZ-KIT Lite or connect three or more EZ-KIT Lites,
obtain a standard, off the shelf connector from Samtec. For more informa-
tion, see “Link Port /JTAG Connectors (J3 and P8)” on page 2-25.
By default, the EZ-KIT Lite boots from the parallel flash memory. Link
port 0 can be selected as the boot source by setting the boot mode select
switch (SW2) to position 6. See “Boot Mode Select Switch (SW2)” on
page 2-19.
General-Purpose I/O (GPIO)
Four LEDs are available via programmable pins PG14, PG15, PE14, and
PB11. The connections are on by default and can be shut off through
SoftConfig.
Two push buttons are available on programmable flags PB10 and PE01.
The push buttons are connected to the processor by default. Use SoftCon-
fig to disconnect the push buttons. Refer to “Software-Controlled
Switches (SoftConfig)” on page 2-3 for more information.
JTAG Interface
The EZ-KIT Lite design enables a multi-processor JTAG session using
connectors
P8 and J3. By default, the board is set up in single-processor
mode. In single-processor mode, create a CCES session based on a stand-
alone debug agent or an external emulator. To use the EZ-KIT Lite in