Datasheet

ADSP-21369 EZ-KIT Lite Evaluation System Manual ix
PREFACE
Thank you for purchasing the ADSP-21369 EZ-KIT Lite
®
, Analog
Devices, Inc. evaluation system for SHARC
®
processors.
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated I/O processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today’s de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++
®
development environment to test capabilities of the
ADSP-21369 SHARC processors. The VisualDSP++ development envi-
ronment aides advanced application code development and debug,
such as:
Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21369 assembly
Load, run, step, halt, and set breakpoints in application programs
Read and write data and program memory
Read and write core and peripheral registers
Plot memory
Access to the ADSP-21369 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface provides unrestricted access to the ADSP-21369 processor and