Datasheet

INDEX
I-4 ADSP-21369 EZ-KIT Lite Evaluation System Manual
S
schematic, of ADSP-21369 EZ-KIT Lite, B-1
SDRAM
chip select pin (FLAG8), 2-6
configuration, 1-8
controller, 1-8
control signals, 2-7
via external port, 2-3
serial peripheral interface, See SPI
setup, of this EZ-KIT Lite, 1-3
signal routing units
SRU2 (DPI interface), 1-10, 2-5
SRU (DAI interface), 1-10, 2-4
spacing headers, 2-25
S/PDIF receivers, 1-10
SPI
disable switch (SW15), 2-13
flash memory, 1-7, 1-8, 2-6
master/slave boot modes, 2-3, 2-10
port, 1-8, 1-11
SRAM
async memory controller, 1-9
configuration, 1-7
via external port, 2-3
startup, of this EZ-KIT Lite, 1-5
SW12 (reset) push button, 2-17
SW13 (ELVIS station) switch, 2-14
SW14 (test) switch, 2-12
SW15 (SPI disable) switch, 2-13
SW1 (oscilloscope) switch, 2-13
SW2 (boot mode select) switch, 2-3, 2-6, 2-10
SW3 (AD1835A codec) switch, 2-5, 2-11
SW4 (microphone) switch, 1-11, 2-12
SW6 (test) switch, 2-12
SW7 (push button enable) DIP switch, 1-4,
1-12, 2-13, 2-17
SW8-11 (general input) push buttons, 2-17
synchronous dynamic random access memory,
See SDRAM
synchronous random access memory, See SRAM
system architecture, of this EZ-KIT Lite, 2-2
T
test switches (SW6, SW14), 2-12
time-division multiplexed (TDM) mode, 1-10
U
UART
interface, xi, 2-6
enable switch (SW5)
universal asynchronous receiver/transmitter, See
UART
USB
interface, 2-8, 2-25
cable, 1-3, 1-5, 2-16, 2-17
interface chip (U34), 2-17
monitor LED (ZLED3), 1-5, 2-16
V
VisualDSP++
environment, 1-5
voltage-controlled oscillator select jumper (JP1),
2-19