Datasheet

INDEX
I-2 ADSP-21369 EZ-KIT Lite Evaluation System Manual
core
clock rates, 2-10
frequency, 2-3
to CLKIN ratios, 2-10
voltage, 2-2
current limits, 2-7
customer support, -xv
D
DAC1-0 signals, 2-14
DAI
block diagram, 2-4
connections, 1-12, 1-13, 2-16
data transfer from codec, 1-10
disabling (SW3), 2-5, 2-11
header (P4), 2-4, 2-25
DAI16-15 pins, 1-13
DAI20-19 pins, 2-13, 2-17
DAI4 pins, 2-20
DAIP20-11 pins, 2-7
DATA31-0 pins, 2-7
data acquisition (DAQ) devices, 1-9
DB9 connectors, xi, 2-24
default configuration, of this EZ-KIT Lite, 1-3
digital
audio interface, See DAI
peripheral interface, See DPI
digital-to-analog converters (DACs), See
AD1835A
DIP switch (SW7), 1-4, 1-12, 2-13, 2-17
DMA controller, 1-8
DPI
block diagram, 2-5
connections, 1-8, 1-13, 2-16
disabling (SW2), 2-6
header (P3), 2-6, 2-24
DPI12-10 pins, 2-7, 2-12
DPI14-13 pins, 1-13, 2-7
DPI2-1 (MOSI-0) pins, 1-8, 2-7
DPI3 (SPI clock) pins, 1-8, 2-7
DPI4 pins, 1-11, 2-7
DPI5 (chip select) pins, 1-8, 2-7
DPI8-6 pins, 1-
13
, 2-7
E
electret microphone, 1-11, 2-12
ELVIS (Educational Laboratory Virtual
Instrumentation Suite)
interface, 1-9
programmable flag jumper (JP4), 2-20
select jumper (JP2), 2-19
trigger pins, 2-20
voltage select jumper (JP3), 2-20
EPROM/flash boot mode, 2-3
example programs, 1-13
expansion interface, 2-3, 2-5, 2-6, 2-7, 2-22
external
memory, 1-8
phase lock loop, See PLL
ports, 2-3, 2-10
F
features, of this EZ-KIT Lite, x
FLAG0-1 pins, 1-12, 2-6, 2-7, 2-13, 2-17
FLAG2 pins, 2-6, 2-7
FLAG3 pins, 1-13, 2-6, 2-7, 2-16
FLAG registers, 1-12
flash memory
boot mode (default), 2-10
start/end addresses, 1-8
via external port, 1-7, 2-3
frame sync/clock signals, 1-10, 2-11
FUNCT_OUT signals, 2-15
G
general-purpose I/O pins, 1-12, 2-6, 2-16, 2-17