Datasheet

ADSP-21369 EZ-KIT Lite Evaluation System Manual 2-25

ADSP-21369 EZ-KIT Lite Hardware Reference

DAI Header (P4)

The DAI connector (P4) provides access to all of the DAI signals in the

from of a .1” spacing header. When using the header to access the DAI

pins of the processor, ensure that signals, which normally drive the DAI

pins, are disabled. Refer to “Codec Setup Switch (SW3)” on page 2-11 for

more information on how to disable signals already being driven from

elsewhere on the EZ-KIT Lite.

JTAG Header (ZP4)

The JTAG header (ZP4) is the connecting point for a JTAG in-circuit

emulator pod. When an emulator connects to the JTAG header, the USB

debug interface is disabled.

Pin 3 is missing to provide keying. Pin 3 in the mating connector

should have a plug.

When using an emulator with the EZ-KIT Lite board, follow the

connection instructions provided with the emulator.

Part Description Manufacturer Part Number

20-pin IDC header FCI 68737-420HLF

Part Description Manufacturer Part Number

26-pin IDC header BERG 4102-T08-13LF

Part Description Manufacturer Part Number

14-pin IDC header FCI 68737-414HLF