Datasheet

Data Sheet ADXL345
Table 12. I
2
C Timing (T
A
= 25°C, V
S
= 2.5 V, V
DD I/O
= 1.8 V)
Limit
1, 2
Parameter Min Max Unit Description
f
SCL
400 kHz SCL clock frequency
t
1
2.5 µs SCL cycle time
t
2
0.6
µs
t
HIGH
, SCL high time
t
3
1.3 µs t
LOW
, SCL low time
t
4
0.6 µs t
HD, STA
, start/repeated start condition hold time
t
5
100 ns t
SU, DAT
, data setup time
t
6
3, 4, 5, 6
0 0.9 µs t
HD, DAT
, data hold time
t
7
0.6 µs t
SU, STA
, setup time for repeated start
t
8
0.6 µs t
SU, STO
, stop condition setup time
t
9
1.3 µs t
BUF
, bus-free time between a stop condition and a start condition
t
10
300 ns t
R
, rise time of both SCL and SDA when receiving
0 ns t
R
, rise time of both SCL and SDA when receiving or transmitting
t
11
300 ns t
F
, fall time of SDA when receiving
250
ns
t
F
, fall time of both SCL and SDA when transmitting
C
b
400 pF Capacitive load for each bus line
1
Limits based on characterization results, with f
SCL
= 400 kHz and a 3 mA sink current; not production tested.
2
All values referred to the V
IH
and the V
IL
levels given in Table 11.
3
t
6
is the data hold time that is measured from the falling edge of SCL. It applies to data in transmission and acknowledge.
4
A transmitting device must internally provide an output hold time of at least 300 ns for the SDA signal (with respect to V
IH(min)
of the SCL signal) to bridge the
undefined region of the falling edge of SCL.
5
The maximum t
6
value must be met only if the device does not stretch the low period (t
3
) of the SCL signal.
6
The maximum value for t
6
is a function of the clock low time (t
3
), the clock rise time (t
10
), and the minimum data setup time (t
5(min)
). This value is calculated as
t
6(max)
= t
3
− t
10
− t
5(min)
.
SDA
t
9
SCL
t
3
t
10
t
11
t
4
t
4
t
6
t
2
t
5
t
7
t
1
t
8
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
07925-034
Figure 42. I
2
C Timing Diagram
Rev. E | Page 19 of 40