Datasheet

Data Sheet ADV7623
Rev. D | Page 5 of 16
DATA AND I
2
C TIMING CHARACTERISTICS
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
VIDEO SYSTEM CLOCK AND XTAL
Crystal Nominal Frequency 28.63636 MHz
Crystal Frequency Stability ±50 ppm
External Clock Source
1
External crystal must operate at 1.8 V
Input High Voltage V
IH
XTAL driven with external clock source 1.2 V
Input Low Voltage V
IL
XTAL driven with external clock source 0.4 V
RESET FEATURE
Reset Pulse Width 5 ms
I
2
C PORTS (FAST MODE)
xCL Frequency
2
400 kHz
xCL Minimum Pulse Width High
2
t
1
600 ns
xCL Minimum Pulse Width Low
2
t
2
1.3
µs
Hold Time (Start Condition) t
3
600 ns
Setup Time (Start Condition) t
4
600 ns
xDA Setup Time
2
t
5
100 ns
xCL and xDA Rise Time
2
t
6
300 ns
xCL and xDA Fall Time
2
t
7
300 ns
Setup Time (Stop Condition) t
8
0.6 µs
I
2
C PORTS (NORMAL MODE)
xCL Frequency
2
100 kHz
xCL Minimum Pulse Width High
2
t
1
4.0 µs
xCL Minimum Pulse Width Low
2
t
2
4.7 µs
Hold Time (Start Condition) t
3
4.0 µs
Setup Time (Start Condition) t
4
4.7 µs
xDA Setup Time
2
t
5
250 ns
xCL and xDA Rise Time
2
t
6
1000
ns
xCL and xDA Fall Time
2
t
7
300 ns
Setup Time (Stop Condition) t
8
4.0 µs
AUDIO OUTPUT PORT (MASTER MODE)
SCLK Mark Space Ratio t
13
:t
14
45:55 55:45 % duty
cycle
APx_OUT Data Transition Time (LRCLK)
3
t
15
End of valid data to negative SCLK edge 10 ns
APx_OUT Data Transition Time (LRCLK)
3
t
16
Negative SCLK edge to start of valid data 10 ns
APx_OUT Data Transition Time (I
2
S Data)
3
t
17
End of valid data to negative SCLK edge 5 ns
APx_OUT Data Transition Time (I
2
S Data)
3
t
18
Negative SCLK edge to start of valid data 5 ns
AUDIO INPUT PORT
APx_IN Setup Time (I
2
S Data)
3
t
19
2
ns
APx_IN Hold Time (I
2
S Data)
3
t
20
2 ns
APx_IN Setup Time (LRCLK)
3
t
19
2 ns
APx_IN Hold Time (LRCLK)
3
t
20
2 ns
1
This part must be configured for external oscillator operation. A 1.8 V oscillator must be used.
2
The prefix x refers to S, DDCA_S, DDCB_S, DDCC_S, and DDCD_S.
3
The suffix x refers to 0, 1, 2, 3, 4, and 5.