Datasheet

ADV7342/ADV7343 Data Sheet
Rev. | Page 72 of 108
PRINTED CIRCUIT BOARD LAYOUT AND DESIGN
UNUSED PINS
If the
S_HSYNC
,
S_VSYNC
,
P_HSYNC
, and
P_VSYNC
pins are
not used, they should be tied to V
DD_IO
through a pull-up resistor
(10 kΩ or 4.7 kΩ). Any other unused digital inputs should be tied
to ground. Unused digital output pins should be left floating. DAC
outputs can be either left floating or connected to GND. Disabling
these outputs is recommended.
DAC CONFIGURATIONS
The ADV7342/ADV7343 contain six DACs. All six DACs can
be configured to operate in low-drive mode. Low-drive mode is
defined as 4.33 mA full-scale current into a 300 Ω load, R
L
.
DAC 1, DAC 2, and DAC 3 can also be configured to operate in
full-drive mode. Full-drive mode is defined as 34.7 mA full-
scale current into a 37.5 Ω load, R
L
. Full-drive is the recommended
mode of operation for DAC 1, DAC 2, and DAC 3.
The ADV7342/ADV7343 contain two R
SET
pins. A resistor
connected between the R
SET1
pin and AGND is used to control
the full-scale output current and, therefore, the DAC output
voltage levels of DAC 1, DAC 2, and DAC 3. For low-drive
operation, R
SET1
must have a value of 4.12 kΩ, and R
L
must have a
value of 300 Ω. For full-drive operation, R
SET1
must have a value
of 510 Ω, and R
L
must have a value of 37.5 Ω.
A resistor connected between the R
SET2
pin and AGND is used
to control the full-scale output current and, therefore, the DAC
output voltage levels of DAC 4, DAC 5, and DAC 6. R
SET2
must
have a value of 4.12 kΩ, and R
L
must have a value of 300 Ω (that
is, low-drive operation only).
The resistors connected to the R
SET1
and R
SET2
pins should have a
1% tolerance.
The ADV7342/ADV7343 contain two compensation pins,
COMP1 and COMP2. A 2.2 nF compensation capacitor should
be connected from each of these pins to V
AA
.
VOLTAGE REFERENCE
The ADV7342/ADV7343 contain an on-chip voltage reference
that can be used as a board-level voltage reference via the V
REF
pin. Alternatively, the ADV7342/ADV7343 can be used with an
external voltage reference by connecting the reference source to
the V
REF
pin. For optimal performance, use an external voltage
reference such as the AD1580 with the ADV7342/ ADV7343. If an
external voltage reference is not used, a 0.1 µF capacitor should
be connected from the V
REF
pin to V
AA
.
VIDEO OUTPUT BUFFER AND OPTIONAL
OUTPUT FILTER
An output buffer is necessary on any DAC that operates in low-
drive mode (R
SETx
= 4.12 kΩ, R
L
= 300 Ω). Analog Devices
produces a range of op amps suitable for this application, for
example, the AD8061. For more information about line driver
buffering circuits, see the relevant op amp data sheet.
An optional reconstruction (anti-imaging) low-pass filter (LPF)
may be required on the ADV7342/ADV7343 DAC outputs if
the ADV7342/ADV7343 are connected to a device that requires
this filtering.
The filter specifications vary with the application. The use of
16× (SD), 8× (ED), or 4× (HD) oversampling can remove the
requirement for a reconstruction filter altogether.
For applications requiring an output buffer and reconstruction
filter, the ADA4430-1, ADA4411-3, and ADA4410-6 integrated
video filter buffers should be considered.
Table 58. ADV7342/ADV7343 Output Rates
Input Mode
(Subaddress 0x01,
Bits[6:4])
PLL Control
(Subaddress
0x00, Bit 1) Output Rate (MHz)
SD Only Off 27 (2x)
On 216 (16x)
ED Only Off 27 (1x)
On 216 (8x)
HD Only Off 74.25 (1x)
On 297 (4x)
Table 59. Output Filter Requirements
Application Oversampling
Cutoff
Frequency
(MHz)
Attenuation
–50 dB at
(MHz)
SD 2× >6.5 20.5
SD 16× >6.5 209.5
ED 1× >12.5 14.5
ED
8×
>12.5
203.5
HD 1× >30 44.25
HD 4× >30 267
560Ω
600Ω22pF600Ω
DAC
OUTPUT
75Ω
BNC
OUTPUT
10µH
560Ω
3
4
1
06399-085
Figure 83. Example of Output Filter for SD, 16× Oversampling
560Ω
6.8pF
600Ω
6.8pF 600Ω
DAC
OUTPUT
75Ω
BNC
OUTPUT
4.7µH
560Ω
3
4
1
06399-086
Figure 84. Example of Output Filter for ED, 8× Oversampling
D