Datasheet
ADV7320/ADV7321
Rev. A | Page 52 of 88
SD Brightness Detect
[Subaddress 0x7A]
The ADV7320/ADV7321 allow monitoring the brightness level
of the incoming video data. Brightness detect is a read-only
register.
Double Buffering
[Subaddress 0x13, Bit 7; Subaddress 0x48, Bit 2]
Double-buffered registers are updated once per field upon the
falling edge of the Vsync signal. Double buffering improves the
overall performance because modifications to register settings
are not made during active video, but take effect upon the start
of the active video.
Double buffering can be activated on the following HD
registers: HD Gamma Curve A, HD Gamma Curve B, and HD
CGMS registers.
Double buffering can be activated on the following SD registers:
SD Gamma Curve A and SD Gamma Curve B, SD Y scale, SD U
scale, SD V scale, SD brightness, SD closed captioning, and SD
Macrovision Bits 5 to 0.
NTSC WITHOUT PEDESTAL
NO SETUP
VALUE ADDED
POSITIVE SETUP
VALUE ADDED
100 IRE
0 IRE
NEGATIVE SETUP
VALUE ADDED
–7.5 IRE
+7.5 IRE
05067-069
Figure 69. Examples of Brightness Control Values










