Datasheet

ADV7320/ADV7321
Rev. A | Page 17 of 88
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
64
GND_IO
63
CLKIN_B
62
S9
61
S8
60
S7
59
S6
58
S5
57
DGND
56
V
DD
55
S4
54
S3
53
S2
52
S1
51
S0
50
S_HSYNC
49
S_VSYNC
47
R
SET1
46
V
REF
45
COMP1
42
DAC C
43
DAC B
44
DAC A
48
S_BLANK
41
V
AA
40
AGND
39
DAC D
37
DAC F
36
COMP2
35
R
SET2
34
EXT_LF
33
RESET
38
DAC E
2
Y0
3
Y1
4
Y2
7
Y5
6
Y4
5
Y3
1
V
DD_IO
8
Y6
9
Y7
10
V
DD
12
Y8
13
Y9
14
C0
15
C1
16
C2
11
DGND
17
C3
18
C4
19
I
2
C
20
ALSB
21
SDA
22
SCLK
23
P_HSYNC
24
P_VSYNC
25
P_BLANK
26
C5
27
C6
28
C7
29
C8
30
C9
31
RTC_SCR_TR
32
CLKIN_A
PIN 1
ADV7320/ADV7321
TOP VIEW
(Not to Scale)
05067-019
Figure 19. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Input/Output Description
11, 57 DGND G Digital Ground.
40 AGND G Analog Ground.
32 CLKIN_A I Pixel Clock Input for HD Only (74.25 MHz), PS Only (27 MHz), and SD Only (27 MHz).
63 CLKIN_B I
Pixel Clock Input. Requires a 27 MHz reference clock for PS mode or a 74.25 MHz (74.1758 MHz)
reference clock in HDTV mode. This clock is only used in dual modes.
45, 36
COMP1,
COMP2
O Compensation Pin for DACs. Connect 0.1 µF capacitor from COMP pin to V
AA
.
44 DAC A O CVBS/Green/Y/Y Analog Output.
43 DAC B O Chroma/Blue/U/Pb Analog Output.
42 DAC C O Luma/Red/V/Pr Analog Output.
39 DAC D O
In SD Only Mode: CVBS/Green/Y Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Y/Green [HD] Analog Output.
38 DAC E O
In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pr/Red Analog Output.
37 DAC F O
In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pb/Blue [HD] Analog Output.
23
P_HSYNC
I Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
24
P_VSYNC
I Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
25
P_BLANK
I Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
48
S_BLANK
I/O Video Blanking Control Signal for SD Only.
49
S_VSYNC
I/O Video Vertical Sync Control Signal for SD Only.
50
S_HSYNC
I/O Video Horizontal Sync Control Signal for SD Only.
13, 12,
9 to 2
Y9 to Y0 I
SD or PS/HDTV Input Port for Y Data. Input port for interleaved progressive scan data. The LSB
is set up on Pin Y0. For 8-bit data input, LSB is set up on Pin Y2.
30 to 26,
18 to 14
C9 to C0 I
PS/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb[Blue/U] data. The LSB is set
up on Pin C0. For 8-bit data input, LSB is set up on Pin C2.