Datasheet

ADV7194
–7–
REV. A
3.3 V TIMING CHARACTERISTICS
Parameter Min Typ Max Unit Test Conditions
MPU PORT
SCLOCK Frequency 0 400 kHz
SCLOCK High Pulsewidth, t
1
0.6 µs
SCLOCK Low Pulsewidth, t
2
1.3 µs
Hold Time (Start Condition), t
3
0.6 µs After This Period the First Clock Is Generated
Setup Time (Start Condition), t
4
0.6 µs Relevant for Repeated Start Condition
Data Setup Time, t
5
100 ns
SDATA, SCLOCK Rise Time, t
6
300 ns
SDATA, SCLOCK Fall Time, t
7
300 ns
Setup Time (Stop Condition), t
8
0.6 2 µs
ANALOG OUTPUTS
Analog Output Delay 8 ns
DAC Analog Output Skew 0.1 ns
CLOCK CONTROL AND PIXEL
PORT
3
f
CLOCK
27 MHz
Clock High Time, t
9
8ns
Clock Low Time, t
10
8ns
Data Setup Time, t
11
6ns
Data Hold Time, t
12
4ns
Control Setup Time, t
11
2.5 ns
Control Hold Time, t
12
3ns
Digital Output Access Time, t
13
13 ns
Digital Output Hold Time, t
14
12 ns
Pipeline Delay, t
15
, 2× Oversampling 37 Clock Cycles
TELETEXT PORT
4
Digital Output Access Time, t
16
11 ns
Data Setup Time, t
17
3ns
Data Hold Time, t
18
6ns
RESET CONTROL
RESET Low Time 3 20 ns
PLL
PLL Output Frequency 54 MHz
NOTES
1
Temperature range T
MIN
to T
MAX
: 0°C to 70°C.
2
Guaranteed by characterization.
3
Pixel Port consists of the following:
Data: P0–P9, Y0/P10–Y9/P19,
Control: HSYNC, VSYNC , BLANK
Clock: CLKIN Input.
4
Teletext Port consists of:
Digital Output: TTXRQ,
Data: TTX.
Specifications subject to change without notice.
(V
AA
= 3.3 V 150 mV, V
REF
= 1.235 V, R
SET1,2
= 1200 unless otherwise noted. All
specifications T
MIN
to T
MAX
1
unless otherwise noted.)
2