Datasheet

ADV7189B
Rev. B | Page 94 of 104
EXAMPLES USING 27 MHz CLOCK
Mode 1 CVBS Input (Composite Video on AIN5)
All standards are supported through autodetect, 10-bit, 4:2:2, ITU-R BT.656 output on P19 to P10.
Table 91. Mode 1 CVBS Input
Register Address Register Value Notes
0x00 0x04 CVBS input on AIN5.
0x03 0x00 Enable 10-bit output on P19 to P10.
0x15 0x00 Slow down digital clamps.
0x17 0x41 Set CSFM to SH1.
0x3A 0x16 Power down ADC 1 and ADC 2.
0x50 0x04 Set DNR threshold to 4 for flat response.
0x0E 0x80
ADI recommended programming sequence. This sequence must be followed exactly when
setting up the decoder.
0x50 0x20 Recommended setting.
0x52 0x18 Recommended setting.
0x58 0xED Recommended setting.
0x77 0xC5 Recommended setting.
0x7C 0x93 Recommended setting.
0x7D 0x00 Recommended setting.
0xD0 0x48 Recommended setting.
0xD5 0xA0 Recommended setting.
0xD7 0xEA Recommended setting.
0xE4 0x3E Recommended setting.
0xE9 0x3E Recommended setting.
0xEA 0x0F Recommended setting.
0x0E 0x00 Recommended setting.