Datasheet

ADV7188
Rev. A | Page 81 of 112
REGISTER ACCESSES
The MPU can write to and read from all of the ADV7188’s
registers except those that are read only or write only. The
subaddress register determines which register the next read or
write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
A read/write operation is then performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
REGISTER PROGRAMMING
The I C Register Maps
2
section describes each register in terms
of its configuration. After the part has been accessed via the bus
and a read/write operation is selected, the subaddress is set up.
The subaddress register determines to/from which register the
operation takes place.
Table 106 and Table 107 list the various
operations controlled by the subaddress register.
As can be seen in
Figure 48, the registers in the ADV7188 are
arranged into two maps: the user map (enabled by default) and
the user sub map. The user sub map has controls for the interrupt
and VDP functionality of the ADV7188, and the user map controls
everything else.
The user map and the user sub map consist of a common space
from Address 0x00 to Address 0x3F. Depending on how Bit 5 in
Register 0x0E (SUB_USR_EN) is set, the register map is then
split into two sections.
SUB_USR_EN, Address 0x0E [5]
This bit splits the register map at Register 0x40.
0 (default)—The register map does not split and the user map
is enabled.
1—The register map splits and the user sub map is enabled.
COMMON I
2
C SPACE
ADDRESSES 0x00 TO 0x3F
ADDRESS 0x0E BIT 5 = 0b
ADDRESS 0x0E BIT 5 = 1b
I
2
C SPACE
ADDRESSES 0x40 TO 0xFF
I
2
C SPACE
ADDRESSES 0x40 TO 0x9C
USER MAP
USER SUB MAP
NORMAL REGISTER SPACE
INTERRUPT AND VDP REGISTER SPACE
05478-048
Figure 48. Register Access —User Map and User Sub Map
I
2
C SEQUENCER
An I
2
C sequencer is used when a parameter exceeds eight bits
and is therefore distributed over two or more I
2
C registers, for
example, HSB [11:0].
When such a parameter is changed using two or more I
2
C write
operations, the parameter may hold an invalid value for the time
between the first and last I
2
Cs. In other words, the top bits of
the parameter may hold the new value while the remaining bits
of the parameter still hold the previous value.
To avoid this problem, the I
2
C sequencer holds the already
updated bits of the parameter in local memory. All bits of the
parameter are updated together after the last register write
operation has completed.
The correct operation of the I
2
C sequencer relies on the
following:
• All I
2
C registers for the parameter in question must be
written to in order of ascending addresses. For example,
for HSB [10:0], write to Address 0x34 first, followed by
Address 0x35.
•
No other I
2
C can take place between the two (or more) I
2
C
writes for the sequence. For example, for HSB [10:0], write
to Address 0x34 first immediately followed by Address 0x35.
I
2
C PROGRAMMING EXAMPLES
A register programming script consisting of I
2
C programming
examples for all standard modes supported by the ADV7188 is
available from the ADV7188 product page on the Analog Devices
website. The examples provided are applicable to a system with the
analog inputs arranged as shown in
Figure 52. The input selection
registers change in accordance with the layout of the PCB.