Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- FUNCTIONAL BLOCK DIAGRAM
- TABLE OF CONTENTS
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- GENERAL DESCRIPTION
- TYPICAL PERFORMANCE CHARACTERISTICS
- FEATURES
- COLOR BAR GENERATION
- SQUARE PIXEL MODE
- COLOR SIGNAL CONTROL
- BURST SIGNAL CONTROL
- NTSC PEDESTAL CONTROL
- PIXEL TIMING DESCRIPTION
- SUBCARRIER RESET
- REAL-TIME CONTROL
- Video Timing Description
- Vertical Blanking Data Insertion
- Mode 0 (CCIR-656): Slave Option
- Mode 0 (CCIR-656): Master Option
- Mode 1: Slave Option HSYNC, BLANK, FIELD
- Mode 1: Master Option HSYNC, BLANK, FIELD
- Mode 2: Slave Option HSYNC, VSYNC, BLANK
- Mode 2: Master Option HSYNC, VSYNC, BLANK
- Mode 3: Master/Slave Option HSYNC, BLANK, FIELD
- POWER-ON RESET
- SCH PHASE MODE
- MPU PORT DESCRIPTION
- REGISTER ACCESSES
- REGISTER PROGRAMMING
- SUBADDRESS REGISTER (SR7–SR0)
- REGISTER SELECT (SR5–SR0)
- MODE REGISTER 1 (MR1)
- MODE REGISTER 2 (MR2)
- MODE REGISTER 3 (MR3)
- MODE REGISTER 4 (MR4)
- TIMING MODE REGISTER 0 (TR0)
- TIMING MODE REGISTER 1 (TR1)
- SUBCARRIER FREQUENCY REGISTERS 3–0
- SUBCARRIER PHASE REGISTER
- CLOSED CAPTIONING EVEN FIELD DATA REGISTERS 1–0
- CLOSED CAPTIONING ODD FIELD DATA REGISTERS 1–0
- NTSC PEDESTAL/PAL TELETEXT CONTROL REGISTERS 3–0
- TELETEXT REQUEST CONTROL REGISTER (TC07)
- CGMS_WSS REGISTER 0 (C/W0)
- CGMS_WSS REGISTER 1 (C/W1)
- CGMS_WSS REGISTER 2 (C/W2)
- APPENDIX 1—BOARD DESIGN AND LAYOUT CONSIDERATIONS
- APPENDIX 2—CLOSED CAPTIONING
- APPENDIX 3—COPY GENERATION MANAGEMENT SYSTEM (CGMS)
- APPENDIX 4—WIDE SCREEN SIGNALING (WSS)
- APPENDIX 5—TELETEXT
- APPENDIX 6—WAVEFORMS
- APPENDIX 7—OPTIONAL OUTPUT FILTER
- APPENDIX 8—RECOMMENDED REGISTER VALUES
- OUTLINE DIMENSIONS
ADV7174/ADV7179
Rev. B | Page 27 of 52
REGISTER PROGRAMMING
This section describes the configuration of each register,
including the subaddress register, mode registers, subcarrier
frequency registers, the subcarrier phase register, timing
registers, closed captioning extended data registers, closed
captioning data registers, and NTSC pedestal control registers.
SUBADDRESS REGISTER (SR7–SR0)
The communications register is an 8-bit write-only register.
After the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
Figure 37 shows the various operations under the control of the
subaddress register. Zero should always be written to SR7–SR6.
REGISTER SELECT (SR5–SR0)
These bits are set up to point to the required starting address.
SR4 SR3 SR2
SR1
SR0SR7 SR6 SR5
ZERO SHOULD BE WRITTEN
TO THESE BITS
SR7 – SR6(000)
POWER-UP
VALUES
SR5 SR4 SR3 SR2 SR1 SR0
0 0 0 MODE REGISTER 0
0 0 1 MODE REGISTER 1
001MODEREGISTER2
001MODEREGISTER3
000MODEREGISTER4
0 0 0 RESERVED
0 0 1 RESERVED
001TIMINGMODEREGISTER0
010TIMINGMODEREGISTER1
0 1 0 SUBCARRIER FREQUENCY REGISTER 0
0 1 1 SUBCARRIER FREQUENCY REGISTER 1
0 1 1 SUBCARRIER FREQUENCY REGISTER 2
0 1 0 SUBCARRIER FREQUENCY REGISTER 3
0 1 0 SUBCARRIER PHASE REGISTER
0 1 1 CLOSED CAPTIONING EXTENDED DATA BYTE 0
0 1 1 CLOSED CAPTIONING EXTENDED DATA BYTE 1
0 0 0 CLOSED CAPTIONING DATA BYTE 0
0 0 0 CLOSED CAPTIONING DATA BYTE 1
0 0 1 NTSC PEDESTAL CONTROL REGISTER 0/
PAL TTX CONTROL REGISTER 0
0 0 1 NTSC PEDESTAL CONTROL REGISTER 1/
PAL TTX CONTROL REGISTER 1
0 0 0 NTSC PEDESTAL CONTROL REGISTER 2/
PAL TTX CONTROL REGISTER 2
0 0 0 NTSC PEDESTAL CONTROL REGISTER 3/
PAL TTX CONTROL REGISTER 3
0 0 1 CGMS_WSS_0
0 0 1 CGMS_WSS_1
0 1 0 CGMS_WSS_2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
11
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
00
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1 TELETEXT REQUEST CONTROL REGISTER
ADV7179 SUBADDRESS REGISTER
SR5 SR4 SR3 SR2 SR1 SR0
ADV7174 SUBADDRESS REGISTER
0 0 0 MODE REGISTER 0
0 0 0 MODE REGISTER 1
0 0 1 MODE REGISTER 2
0 0 1 MODE REGISTER 3
0 0 0 MODE REGISTER 4
0 0 0 RESERVED
0 0 1 RESERVED
0 0 1 TIMING MODE REGISTER 0
0 1 0 TIMING MODE REGISTER 1
0 1 0 SUBCARRIER FREQUENCY REGISTER 0
0 1 1 SUBCARRIER FREQUENCY REGISTER 1
0 1 1 SUBCARRIER FREQUENCY REGISTER 2
0 1 0 SUBCARRIER FREQUENCY REGISTER 3
0 1 0 SUBCARRIER PHASE REGISTER
0 1 1 CLOSED CAPTIONING EXTENDED DATA BYTE 0
0 1 1 CLOSED CAPTIONING EXTENDED DATA BYTE 1
0 0 0 CLOSED CAPTIONING DATA BYTE 0
0 0 0 CLOSED CAPTIONING DATA BYTE 1
0 0 1 NTSC PEDESTAL CONTROL REGISTER 0/
PAL TTX CONTROL REGISTER 0
0 0 1 NTSC PEDESTAL CONTROL REGISTER 1/
PAL TTX CONTROL REGISTER 1
0 0 0 NTSC PEDESTAL CONTROL REGISTER 2/
PAL TTX CONTROL REGISTER 2
0 0 0 NTSC PEDESTAL CONTROL REGISTER 3/
PAL TTX CONTROL REGISTER 3
0 0 1 CGMS_WSS_0
0 0 1 CGMS_WSS_1
0 1 0 CGMS_WSS_2
0 1 0 TELETEXT REQUEST CONTROL REGISTER
0 1 1 RESERVED
0 1 1 RESERVED
0 1 0 RESERVED
0 1 0 RESERVED
0 1 1 MACROVISION REGISTERS
0 1 1 MACROVISION REGISTERS
1 0 0 MACROVISION REGISTERS
1 0 0 MACROVISION REGISTERS
1 0 1 MACROVISION REGISTERS
1 0 1 MACROVISION REGISTERS
1 0 0 MACROVISION REGISTERS
1 0 0 MACROVISION REGISTERS
1 0 1 MACROVISION REGISTERS
1 0 1 MACROVISION REGISTERS
1 1 0 MACROVISION REGISTERS
1 1 0 MACROVISION REGISTERS
1 1 1 MACROVISION REGISTERS
1 1 1 MACROVISION REGISTERS
1 1 0 MACROVISION REGISTERS
1 1 0 MACROVISION REGISTERS
1 1 1 MACROVISION REGISTERS
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
01
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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00hMACROVISION REGISTERS
02980-A-036
Figure 37. Subaddress Register Map