Datasheet

ManualsBrandsANALOG DEVICES ManualsLinear ICsADV7171KSUZ

ADV7170/ADV7171

Rev. C | Page 49 of 64

APPENDIX 9—RECOMMENDED REGISTER VALUES

The ADV7170/ADV7171 registers can be set depending on the

user standard required.

The following examples give the various register formats for

several video standards.

In each case, the output is set to composite o/p with all DACs

powered up and with the

BLANK

input control disabled.

Additionally, the burst and color information are enabled on the

output and the internal color bar generator is switched off. In

the examples shown, the timing mode is set to Mode 0 in slave

format. TR02 to TR00 of the Timing Register 0 control the

timing modes. For a detailed explanation of each bit in the

command registers, please see the

section. TR07 should be toggled after setting up a new timing

mode. Timing Register 1 provides additional control over the

position and duration of the timing signals. In the examples,

this register is programmed in default mode.

Table 13. PAL B/D/G/H/I (F

= 4.43361875 MHz)

Address Data

00Hex Mode Register 0 05Hex

01Hex Mode Register 1 00Hex

02Hex Mode Register 2 00Hex

03Hex Mode Register 3 00Hex

04Hex Mode Register 4 00Hex

07Hex Timing Register 0 00Hex

08Hex Timing Register 1 00Hex

09Hex Subcarrier Frequency Register 0 CBHex

0AHex Subcarrier Frequency Register 1 8AHex

0BHex Subcarrier Frequency Register 2 09Hex

0CHex Subcarrier Frequency Register 3 2AHex

0DHex Subcarrier Phase Register 00Hex

0EHex Closed Captioning Ext Register 0 00Hex

0FHex Closed Captioning Ext Register 1 00Hex

10Hex Closed Captioning Register 0 00Hex

11Hex Closed Captioning Register 1 00Hex

12Hex Pedestal Control Register 0 00Hex

13Hex Pedestal Control Register 1 00Hex

14Hex Pedestal Control Register 2 00Hex

15Hex Pedestal Control Register 3 00Hex

16Hex CGMS_WSS Register 0 00Hex

17Hex CGMS_WSS Register 1 00Hex

18Hex CGMS_WSS Register 2 00Hex

19Hex Teletext Request Control Register 00Hex

Table 14. PAL M (F

= 3.57561149 MHz)