Datasheet

–6– REV. 0
ADV7127–SPECIFICATIONS
5 V/3.3 V DYNAMIC SPECIFICATIONS
Parameter Min Typ Max Units
DAC PERFORMANCE
Glitch Impulse
2, 3
10 pVs
Data Feedthrough
2, 3
22 dB
Clock Feedthrough
2, 3
33 dB
NOTES
1
These max/min specifications are guaranteed by characterization.
2
TTL input values are for 0 V and 3 V with input rise/fall times ≤3 ns, measured at the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
3
Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
Specifications subject to change without notice.
(V
AA
= (3 V–5.25 V)
1
, V
REF
= 1.235 V, R
SET
= 560 V, C
L
= 10 pF. All specifications
are for T
A
= +258C unless otherwise noted, T
J MAX
= 1108C)
5 V TIMING SPECIFICATIONS
1
Parameter Min Typ Max Units Condition
ANALOG OUTPUTS
Analog Output Delay, t
6
5.5 ns
Analog Output Rise/Fall Time, t
7
4
1.0 ns
Analog Output Transition Time, t
8
5
15 ns
Analog Output Skew, t
9
6
12 ns
CLOCK CONTROL
f
CLK
7
0.5 50 MHz 50 MHz Grade
f
CLK
7
0.5 140 MHz 140 MHz Grade
f
CLK
7
0.5 240 MHz 240 MHz Grade
Data and Control Setup, t
1
1.5 ns
Data and Control Hold, t
2
2.5 ns
Clock Pulsewidth High, t
4
1.875 1.1 ns f
MAX
= 240 MHz
Clock Pulsewidth Low t
5
1.875 1.25 ns f
MAX
= 240 MHz
Clock Pulsewidth High t
4
2.85 ns f
MAX
= 140 MHz
Clock Pulsewidth Low t
5
2.85 ns f
MAX
= 140 MHz
Clock Pulsewidth High t
4
8.0 ns f
MAX
= 50 MHz
Clock Pulsewidth Low t
5
8.0 ns f
MAX
= 50 MHz
Pipeline Delay, t
PD
6
1.0 1.0 1.0 Clock Cycles
PSAVE Up Time, t
10
6
210 ns
PDOWN Up Time, t
11
8
320 ns
NOTES
1
Timing specifications are measured with input levels of 3.0 V (V
IH
) and 0 V (V
IL
) 0 for both 5 V and 3.3 V supplies.
2
These maximum and minimum specifications are guaranteed over this range.
3
Temperature range: T
MIN
to T
MAX
: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization.
8
This power-down feature is only available on the ADV7127 in the TSSOP package.
Specifications subject to change without notice.
(V
AA
= +5 V 6 5%
2
, V
REF
= 1.235 V, R
SET
= 560 V, C
L
= 10 pF. All specifications T
MIN
to T
MAX
3
unless otherwise noted, T
J MAX
= 1108C)