Datasheet

ADV3226/ADV3227
Rev. 0 | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Analog Supply Voltage (AVCC − AVEE) 11 V
Digital Supply Voltage (DVCC − DGND) 6 V
Supply Potential Difference
(AVCC − DVCC)
±0.5 V
Ground Potential Difference
(AGND − DGND)
±0.5 V
Maximum Potential Difference
(DVCC − AVEE)
6 V
Analog Input Voltage AVEE < V
IN
< AVCC
Digital Input Voltage DGND < D
IN
< DVCC
Exposed Paddle Voltage AVEE < V
IN
< AVCC
Output Voltage (Disabled Analog
Output)
AVEE < V
OUT
< AVCC
Output Short-Circuit
Duration Momentary
Current Internally limited to 55 mA
Temperature
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Junction Temperature 150°C
Lead Temperature (Soldering,
10 sec)
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 6. Thermal Resistance
Package Type θ
JA
θ
JC
θ
JB
ψ
JT
ψ
JB
Unit
100-Lead LFCSP 26 2.56 9.5 0.2 8.9 °C/W
POWER DISSIPATION
The ADV3226/ADV3227 operate with ±5 V supplies and can
drive loads down to 100 Ω, resulting in a wide range of possible
power dissipations. For this reason, extra care must be taken
when derating the operating conditions based on ambient
temperature.
Packaged in the 100-lead LFCSP, the ADV3226/ADV3227
junction-to-ambient thermal impedance (θ
JA
) is 26°C/W.
For long-term reliability, the maximum allowed junction
temperature of the die should not exceed 125°C; even
temporarily exceeding this limit can cause a shift in parametric
performance due to a change in stresses exerted on the die by
the package. Exceeding a junction temperature of 150°C for an
extended period can result in device failure. In Figure 4, the
curve shows the range of allowed internal die power dissipation
that meets these conditions over the −40°C to +85°C ambient
temperature range. When using Figure 4, do not include the
external load power in the maximum power calculation, but do
include the load current dropped on the die output transistors.
6
5
4
3
2
15 25 35 45 55 65 75 85
MAXIMUM POWER (W)
AMBIENT TEMPERATURE (°C)
T
J
= 150°C
08653-004
Figure 4. Maximum Die Power Dissipation vs. Ambient Temperature
ESD CAUTION