Datasheet

ADV3200/ADV3201
Rev. 0 | Page 35 of 36
OUTxx
INxx
75Ω
07176-103
ADV3200/
ADV3201
Figure 106. Fly-By Input Termination (Grounds for the Two Transmission
Lines Must Be Tied Together Close to the INxx Pin)
If multiple ADV3200/ADV3201s are to be driven in parallel, a
fly-by input termination scheme is very useful, but the distance
from each ADV3200/ADV3201 input to the driven input
transmission line is a stub that should be minimized in length
and parasitics using the discussed guidelines.
Although the examples discussed so far are for input termination,
the theory is similar for output back termination. Taking the
ADV3200/ADV3201 as an ideal voltage source, any distance of
routing between the ADV3200/ADV3201 and a back-termination
resistor is a stub that creates reflections. For this reason, place
back-termination resistors close to the ADV3200/ADV3201. In
practice, because back-termination resistors are series elements,
their footprint in the routing is narrower, and it is easier to place
them close to the ADV3200/ ADV3201 outputs in board layout.
ADV3200/ADV3201
CLK, DATA IN, DATA OUT,
UPDATE, CS, RESET
[CLK, DATA IN, DATA OUT,
UPDATE, CS, RESET]
0402
75Ω
75Ω
BNC
IN[2:0], OSD[24:22], OSD[18:16]
0402
75Ω
75Ω
RCA
IN[5:3], OSD[21:19]
0402
50Ω
50Ω
SMA
IN[8:6], OSD[30:28]
OSD[27:25]
0402
75Ω
75Ω
RCA
IN[31:9], OSD[31], OSD[15:0]
75Ω
6
USB DIGITAL
CONTROL
FROM PC
VPOS VNEG DVCC DGND
75Ω
75Ω
TEST POINT
OUT[15:0]
OUT[31], OUT[15:0]
OUT[18:16]
86.6Ω
150Ω
75Ω
464Ω
BNC
AD8003
464Ω
OUT[21:19]
OUT[24:22]
150Ω
75Ω
464Ω
RCA
AD8003
464Ω
75Ω
BNC
75Ω
OUT[27:25]
75Ω
RCA
75Ω
OUT[30:28]
50Ω
SMA
43Ω75Ω
VCLAMP OSDS[31:0]
OSDS[24:22]
VREF
TEST POINT TEST POINT
BNC
OSDS[18:16]
1kΩ
2kΩ
OSDS[31:0] TO HIGH SPEED
BREAKOUT
07176-101
PADS FOR
VCLAMP
CAPS
10nF 1nF100nF
10nF 1nF100nF
TEST POINT
Figure 107. Evaluation Board Simplified Schematic