Datasheet

ADuM5240/ADuM5241/ADuM5242 Data Sheet
Rev. B | Page 12 of 16
Given the geometry of the receiving coil in the ADuM524x and
an imposed requirement that the induced voltage be at most
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated, as shown in Figure 13.
MAGNETIC FIELD FREQUENCY (Hz)
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
0.001
1M
10
0.01
1k 10k 10M
0.1
1
100M100k
06014-013
Figure 13. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and was of the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 V—still well above the 0.5 V
sensing threshold of the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances from the
ADuM524x transformers. Figure 14 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown in Figure 14, the ADuM524x is extremely
immune and can only be affected by extremely large currents
operated at high frequencies very close to the component. For
the 1 MHz example noted, one would have to place a 0.5 kA
current 5 mm away from the ADuM524x to affect the operation
of the component.
MAGNETIC FIELD FREQUENCY (Hz)
MAXIMUM ALLOWABLE CURRENT (kA)
1000
100
10
1
0.1
0.01
1k 10k 100M100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
06014-014
Figure 14. Maximum Allowable Current
for Various Current-to-ADuM524x Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board (PCB)
traces could induce error voltages sufficiently large enough to
trigger the thresholds of succeeding circuitry. Care should be
taken in the layout of such traces to avoid this possibility.
THERMAL ANALYSIS
Each ADuM524x component consists of two internal die,
attached to a split-paddle lead frame. For the purposes of
thermal analysis, it is treated as a thermal unit with the highest
junction temperature reflected in the θ
JA
value in Table 2. The
value of θ
JA
is based on measurements taken with the part
mounted on a JEDEC standard 4-layer PCB with fine-width
traces in still air. Under normal operating conditions, the
ADuM524x operates at full load across the full temperature
range without derating the output current. For example, a part
with no external load drawing 80 mA and dissipating 400 mW
causes a 32°C temperature rise above ambient. It is normal for
these devices to run warm.
Following the recommendations in the PCB Layout section
decreases the thermal resistance to the PCB allowing increased
thermal margin at high ambient temperatures.
PCB LAYOUT
The ADuM524x requires no external circuitry for its logic
interfaces. Power supply bypassing is required at the input and
output supply pins (see Figure 15).
The power supply section of the ADuM524x uses a 300 MHz
oscillator frequency to pass power through its chip scale trans-
formers. In addition, the normal operation of the data section
of the iCoupler introduces switching transients, as described in
the DC Correctness and Magnetic Field Immunity section, on
the power supply pins (see Figure 11). Low inductance capacitors
are required to bypass noise generated at the switching frequency
as well as 1 ns pulses generated by the data transfer and dc refresh
circuitry. The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
In cases where EMI emission is a concern, series inductance may
be added to critical power and ground traces. Discrete inductors
should be added to the line such that the high frequency bypass
capacitors are between the inductor and the ADuM524x device
pin. Inductance can be added in the form of discrete inductors
or ferrite beads added to both power and ground traces. The
recommended value corresponds to impedance between 50 Ω
and 100 Ω at approximately 300 MHz.
If the switching speed of the data outputs is causing unacceptable
EMI, capacitance to ground can be added at output pins to slow
the rise and fall time of the output. This slew rate limits the output.
Capacitance values depend on application speed requirements.
See the AN-0971 Application Note for board layout guidelines.
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