Datasheet
Data Sheet ADuM3400/ADuM3401/ADuM3402
Rev. D | Page 9 of 24
Parameter Symbol Min Typ Max Unit Test Conditions
90 Mbps (CRW Grade Only)
V
DD1
Supply Current I
DD1 (90)
5 V/3 V Operation 59 82 mA 45 MHz logic signal freq.
3 V/5 V Operation 31 44 mA 45 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (90)
5 V/3 V Operation 17 24 mA 45 MHz logic signal freq.
3 V/5 V Operation 32 46 mA 45 MHz logic signal freq.
ADuM3402, Total Supply Current, Four Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
5 V/3 V Operation 2.0 2.8 mA DC to 1 MHz logic signal freq.
3 V/5 V Operation 1.2 1.7 mA DC to 1 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (Q)
5 V/3 V Operation 1.2 1.7 mA DC to 1 MHz logic signal freq.
3 V/5 V Operation 2.0 2.8 mA DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current I
DD1 (10)
5 V/3 V Operation 6.0 7.5 mA 5 MHz logic signal freq.
3 V/5 V Operation 3.3 4.4 mA 5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (10)
5 V/3 V Operation 3.3 4.4 mA 5 MHz logic signal freq.
3 V/5 V Operation
6.0
7.5
mA
5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
V
DD1
Supply Current I
DD1 (90)
5 V/3 V Operation 46 62 mA 45 MHz logic signal freq.
3 V/5 V Operation 24 39 mA 45 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (90)
5 V/3 V Operation 24 39 mA 45 MHz logic signal freq.
3 V/5 V Operation 46 62 mA 45 MHz logic signal freq.
For All Models
Input Currents I
IA
, I
IB
, I
IC
,
I
ID
, I
E1
, I
E2
−10 +0.01 +10 µA 0 V ≤ V
IA
,V
IB
, V
IC
,V
ID
≤ V
DD1
or V
DD2
,
0 V ≤ V
E1
,V
E2
≤ V
DD1
or V
DD2
Logic High Input Threshold
V
IH
, V
EH
5 V/3 V Operation 2.0 V
3 V/5 V Operation 1.6 V
Logic Low Input Threshold
V
IL
, V
EL
5 V/3 V Operation 0.8 V
3 V/5 V Operation 0.4 V
Logic High Output Voltages V
OAH
, V
OBH
, (V
DD1
or V
DD2
)
−
0.1
(V
DD1
or V
DD2
) V I
Ox
= −20 µA, V
Ix
= V
IxH
V
OCH
, V
ODH
(V
DD1
or V
DD2
)
−
0.4
(V
DD1
or V
DD2
) −
0.2
V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
,
V
OBL
, 0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
V
OCL
, V
ODL
0.04 0.1 V I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ARW Package
Minimum Pulse Width
2
PW 1000 ns C
L
= 15 pF, CMOS signal levels
Maximum Data Rate
3
1 Mbps C
L
= 15 pF, CMOS signal levels
Propagation Delay
4
t
PHL
, t
PLH
50 70 100 ns C
L
= 15 pF, CMOS signal levels
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 40 ns C
L
= 15 pF, CMOS signal levels
Propagation Delay Skew
5
t
PSK
50 ns C
L
= 15 pF, CMOS signal levels
Channel-to-Channel Matching
6
t
PSKCD/OD
50 ns C
L
= 15 pF, CMOS signal levels