Datasheet

ADuM3400/ADuM3401/ADuM3402 Data Sheet
Rev. D | Page 6 of 24
ELECTRICAL CHARACTERISTICS3 V OPERATION
All voltages are relative to their respective ground. 2.7 V ≤ V
DD1
≤ 3.6 V, 2.7 V ≤ V
DD2
≤ 3.6 V; all minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.0 V.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent I
DDI (Q)
0.31 0.49 mA
Output Supply Current per Channel, Quiescent I
DDO (Q)
0.19 0.27 mA
ADuM3400, Total Supply Current, Four Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
1.6 2.1 mA DC to 1 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (Q)
0.7 1.2 mA DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current I
DD1 (10)
4.8 7.1 mA 5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (10)
1.8 2.3 mA 5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
V
DD1
Supply Current I
DD1 (90)
37 54 mA 45 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (90)
11 15 mA 45 MHz logic signal freq.
ADuM3401, Total Supply Current, Four Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
1.4 1.9 mA DC to 1 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (Q)
0.9 1.5 mA DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current I
DD1 (10)
4.1 5.6 mA 5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (10)
2.5 3.3 mA 5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
V
DD1
Supply Current I
DD1 (90)
31 44 mA 45 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (90)
17 24 mA 45 MHz logic signal freq.
ADuM3402, Total Supply Current, Four Channels
1
DC to 2 Mbps
V
DD1
or V
DD2
Supply Current I
DD1 (Q)
, I
DD2 (Q)
1.2 1.7 mA DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
V
DD1
or V
DD2
Supply Current I
DD1 (10)
, I
DD2 (10)
3.3 4.4 mA 5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
V
DD1
or V
DD2
Supply Current I
DD1 (90)
, I
DD2 (90)
24 39 mA 45 MHz logic signal freq.
For All Models
Input Currents I
IA
, I
IB
, I
IC
,
I
ID
, I
E1
, I
E2
−10 +0.01 +10 µA 0 V V
IA
, V
IB
, V
IC
, V
ID
V
DD1
or V
DD2
,
0 V ≤ V
E1
, V
E2
≤ V
DD1
or V
DD2
Logic High Input Threshold
V
IH
, V
EH
1.6 V
Logic Low Input Threshold
V
IL
, V
EL
0.4 V
Logic High Output Voltages V
OAH
, V
OBH
,
(V
DD1
or V
DD2
) − 0.1 3.0 V I
Ox
= −20 µA, V
Ix
= V
IxH
V
OCH
, V
ODH
(V
DD1
or V
DD2
) − 0.4 2.8 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
, 0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
V
OCL
, V
ODL
0.04 0.1 V I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ARW Package
Minimum Pulse Width
2
PW 1000 ns C
L
= 15 pF, CMOS signal levels
Maximum Data Rate
3
1 Mbps C
L
= 15 pF, CMOS signal levels
Propagation Delay
4
t
PHL
, t
PLH
50 75 100 ns C
L
= 15 pF, CMOS signal levels