Datasheet
Data Sheet ADuC845/ADuC847/ADuC848
Rev. C | Page 91 of 108
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
V
CC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
ADM3202
RS-232 INTERFACE
1
1
2
3
4
5
6
7
8
9
DV
DD
STANDARD D-TYPE
SERIAL COMMS
CONNECTOR TO
PC HOST
NOTES
1. EXTERNAL UART TRANSCEIVER INTEGRATED IN SYSTEM OR AS PART
OF AN EXTERNAL DONGLE AS DESCRIBED IN APPLICATION NOTE uC006.
0.1µF
0.1µF
0.1µF
0.1µF
RESET ACTIVE HIGH.
(NORMALLY OPEN)
35
34
43
44
1kΩ
DV
DD
1kΩ
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
DOWNLOAD/DEBUG
ENABLE JUMPER
(NORMALLY OPEN)
32.768kHz
DV
DD
DV
DD
AV
DD
AV
DD
AGND
AGND
REFIN–
REFIN+
P1.0/AIN1
P1.1/AIN2
P1.6/I
EXC
1/AIN7
200µA/400µA
EXCITATION
CURRENT
RTD
R
REF
5.6kΩ
PSEN
EA
XTAL2
XTAL1
RESET
RxD
TxD
DV
DD
DGND
ADuC845/ADuC847/ADuC848
LFCSP PACKAGE
04741-088
11
4
5
6
7
8
56
1
17
18
19
22
36
51
37
38
50
23
0.1µF
Figure 70. UART Connectivity in Typical System
In addition to the basic UART connections, users also need a
way to trigger the chip into download mode. This is
accomplished via a 1 kΩ pull-down resistor that can be
jumpered onto the
PSEN
pin, as shown in Figure 70. To get the
parts into download mode, connect this jumper and power-
cycle the device (or manually reset the device, if a manual reset
button is available), and it is ready to receive a new program
serially. With the jumper removed, the device powers on in
normal mode (and runs the program) whenever power is cycled
or RESET is toggled. Note that
PSEN
is normally an output and
that it is sampled as an input only on the falling edge of RESET,
that is, at power-on or upon an external manual reset. Note also
that if any external circuitry unintentionally pulls
PSEN
low
during power-on or reset events, it could cause the chip to enter
download mode and fail to begin user code execution. To
prevent this, ensure that no external signals are capable of
pulling the
PSEN
pin low, except for the external
PSEN
jumper
itself or the method of download entry in use during a reset or
power-cycle condition.
Embedded Serial Port Debugger
From a hardware perspective, entry to serial port debug mode is
identical to the serial download entry sequence described
previously. In fact, both serial download and serial port debug
modes are essentially one mode of operation used in two
different ways.