Datasheet

Data Sheet ADuC845/ADuC847/ADuC848
Rev. C | Page 85 of 108
INTERRUPT SYSTEM
The ADuC845/ADuC847/ADuC848 provide nine interrupt sources with two priority levels. The control and configuration of the
interrupt system is carried out through three interrupt-related SFRs:
IE
Interrupt Enable Register
IP
Interrupt Priority Register
IEIP2
Secondary Interrupt Enable Register
IE—Interrupt Enable Register
SFR Address: A8H
Power-On Default: 00H
Bit Addressable: Yes
Table 58. IE SFR Bit Designations
Bit No. Name Description
7 EA Set by the user to enable all interrupt sources.
Cleared by the user to disable all interrupt sources.
6 EADC Set by the user to enable the ADC interrupt.
Cleared by the user to disable the ADC interrupt.
5 ET2 Set by the user to enable the Timer 2 interrupt.
Cleared by the user to disable the Timer 2 interrupt.
4 ES Set by the user to enable the UART serial port interrupt.
Cleared by the user to disable the UART serial port interrupt.
3 ET1 Set by the user to enable the Timer 1 interrupt.
Cleared by the user to disable the Timer 1 interrupt.
2 EX1
Set by the user to enable External Interrupt 1 (
INT0).
Cleared by the user to disable External Interrupt 1 (
INT0).
1 ET0 Set by the user to enable the Timer 0 interrupt.
Cleared by the user to disable the Timer 0 interrupt.
0 EX0
Set by the user to enable External Interrupt 0 (
INT0).
Cleared by the user to disable External Interrupt 0 (
INT0).
IP—Interrupt Priority Register
SFR Address: B8H
Power-On Default: 00H
Bit Addressable: Yes
Table 59. IP SFR Bit Designations
Bit No. Name Description
7 ----- Not Implemented. Write Don’t Care.
6 PADC ADC Interrupt Priority (1 = High; 0 = Low).
5 PT2 Timer 2 Interrupt Priority (1 = High; 0 = Low).
4 PS UART Serial Port Interrupt Priority (1 = High; 0 = Low).
3 PT1 Timer 1 Interrupt Priority (1 = High; 0 = Low).
2 PX1
INT0 (External Interrupt 1) priority (1 = High; 0 = Low).
1 PT0 Timer 0 Interrupt Priority (1 = High; 0 = Low).
0
PX0
INT0 (External Interrupt 0) Priority (1 = High; 0 = Low).