Datasheet

Data Sheet ADuC845/ADuC847/ADuC848
Rev. C | Page 83 of 108
Timer 3 Generated Baud Rates
The high integer dividers in a UART block mean that high
speed baud rates are not always possible. Also, generating baud
rates requires the exclusive use of a timer, rendering it unusable
for other applications when the UART is required. To address
this problem, the ADuC845/ADuC847/ADuC848 have a
dedicated baud rate timer (Timer 3) specifically for generating
highly accurate baud rates. Timer 3 can be used instead of
Timer 1 or Timer 2 for generating very accurate high speed
UART baud rates including 115200 and 230400. Timer 3 also
allows a much wider range of baud rates to be obtained. In fact,
every desired bit rate from 12 bps to 393216 bps can be
generated to within an error of ±0.8%. Timer 3 also frees up the
other three timers, allowing them to be used for different
applications. A block diagram of Timer 3 is shown in Figure 61.
÷ (1 + T3FD/64)
T3 Rx/Tx
CLOCK
CORE
CLK
T3EN
Rx CLOCK
Tx CLOCK
TIMER 1/TIMER 2
Rx CLOCK
FRACTIONAL
DIVIDER
0
0
1
1
TIMER 1/TIMER 2
Tx CLOCK
÷
16
÷ 2
DIV
04741-058
Figure 61. Timer 3, UART Baud Rate
Two SFRs (T3CON and T3FD) are used to control Timer 3.
T3CON is the baud rate control SFR, allowing Timer 3 to be
used to set up the UART baud rate, and to set up the binary
divider (DIV).
The appropriate value to write to the DIV2-1-0 bits can be
calculated using the following formula where f
CORE
is defined in
PLLCON SFR. Note that the DIV value must be rounded down.
DIV =
)2(log
16
log








× RateBaud
FrequencyClockCore
T3FD is the fractional divider ratio required to achieve the
required baud rate. The appropriate value for T3FD can be
calculated with the following formula:
T3FD =
RateBaud
FrequencyClockCore
DIV
×
×
−1
2
2
− 64
Note that T3FD should be rounded to the nearest integer. Once
the values for DIV and T3FD are calculated, the actual baud
rate can be calculated with the following formula:
Actual Baud Rate =
)64(2
2
1
+×
×
−
T3FD
FrequencyClockCore
DIV
For example, to get a baud rate of 9600 while operating at a core
clock frequency of 1.5725 MHz, that is, CD = 3,
DIV = log(1572500/(16 × 9600))/log2 = 3.35 = 3
Note that the DIV result is rounded down.
T3FD = (2 × 1572500)/(2
3−1
× 9600) − 64 = 18 = 12H
Therefore, the actual baud rate is 9588 bps, which gives an error
of 0.12%.
The T3CON and T3FD registers are used to control Timer 3.
T3CON – Timer 3 Control Register
SFR Address: 9EH
Power-On Default: 00H
Bit Addressable: No
Table 55. T3CON SFR Bit Designations
Bit No. Name Description
7 T3BAUDEN T3UARTBAUD Enable.
Set to enable Timer 3 to generate the baud rate. When set, PCON.7, T2CON.4, and T2CON.5 are
ignored. Cleared to let the baud rate be generated as per a standard 8052.
6 Not Implemented. Write Don’t Care.
5
Not Implemented. Write Don’t Care.
4 Not Implemented. Write Don’t Care.
3 Not Implemented. Write Don’t Care.
2, 1, 0 DIV2, DIV1, DIV0 Binary Divider
DIV2 DIV1 DIV0
0
0
0
Binary Divider 0. See Table 57.
0 0 1 Binary Divider 1. See Table 57.
0 1 0 Binary Divider 2. See Table 57.
0
1
1
Binary Divider 3. See Table 57.
1 0 0 Binary Divider 4. See Table 57.
1 0 1 Binary Divider 5. See Table 57.
1
1
0
Binary Divider 6. See Table 57.