Datasheet

ADuC841/ADuC842/ADuC843
Rev. 0 | Page 9 of 88
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
52 51 50 49 48 43 42 41 4047 46 45 44
14 15 16 17 18 19 20 21 22 23 24 25 26
1
2
3
4
5
6
7
8
9
10
11
13
12
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
39
38
37
36
35
34
33
32
31
30
29
28
27
P0.7/AD
7
P0.6/AD
6
P0.5/AD
5
P0.4/AD
4
DV
DD
DGND P0.3/AD
3
P0.2/AD
2
P0.1/AD1 P0.0/AD
0
ALE
PSEN EA
P1.7/ADC7
RESET
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1/MISO/PWM1
DV
DD
P3.4/T0/PWMC/PWM0/EXTCLK*
P3.5/T1/CONVST
P3.6/WR
P3.7/RD
SCLOCK
P1.0/ADC0/T2
P1.1/ADC1/T2EX
P1.2/ADC2
P1.3/ADC3
AV
DD
AGND
C
REF
V
REF
DAC0
DAC1
P1.4/ADC4
P1.5/ADC5/SS
P1.6/ADC6
P2.7/PWM1/A15/A23
P2.6/PWM0/A14/A22
P2.5/A13/A21
P2.4/A12/A20
DGND
DV
DD
XTAL2
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
DGND
03260-0-003
ADuC841/ADuC842/ADuC843
52-LEAD PQFP
*EXTCLK NOT PRESENT ON THE ADuC841
Figure 3. 52-Lead PQPF
P1.1/ADC1/T2EX
P1.2/ADC2
P1.3/ADC3
AV
DD
AV
DD
AGND
AGND
AGND
C
REF
V
REF
DAC0
DAC1
P1.4/ADC4
P1.5/ADC5/SS
P1.6/ADC6
P.7/ADC7
RESET
P3.0/RxD
P3.1/TxD
P3.2/INT0
P3.3/INT1/MISO/PWM1
DV
DD
DGND
P3.4/T0/PWMC/PWM0/EXTCLK*
P3.5/T1/CONVST
P3.6/WR
P3.7/RD
SCLOCK
P2.7/A15/A23
P2.6/A14/A22
P2.5/A13/A21
P2.4/A12/A20
DGND
DGND
DV
DD
XTAL1
P2.3/A11/A19
P2.2/A10/A18
P2.1/A9/A17
P2.0/A8/A16
SDATA/MOSI
P1.0/ADC0/T2
P0.7/AD7 P0.6/AD6 P0.5/AD5
P0.4/AD4
DV
DD
DGND
P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0
ALE
PSEN
EA
14
1
2
3
4
5
6
7
8
9
10
11
13
12
15 16 17 18 19 20 21 22 23 24 25 26 27 28
42
41
40
39
38
37
36
35
34
33
32
31
30
29
43 45 46 47 48 49 50
51
52 53 54 55 56
PIN 1
IDENTIFIER
44
XTAL2
TOP VIEW
(Not to Scale)
03260-0-004
ADuC841/ADuC842/ADuC843
56-LEAD CSP
*EXTCLK NOT PRESENT ON THE ADuC841
Figure 4. 56-Lead CSP
Table 3. Pin Function Descriptions
Mnemonic Type Function
DV
DD
P Digital Positive Supply Voltage. 3 V or 5 V nominal.
AV
DD
P Analog Positive Supply Voltage. 3 V or 5 V nominal.
C
REF
I/O Decoupling Input for On-Chip Reference. Connect a 0.47 µF capacitor between this pin and AGND.
V
REF
NC Not connected. This was reference out on the ADuC812; the C
REF
pin should be used instead.
AGND G Analog Ground. Ground reference point for the analog circuitry.
P1.0–P1.7 I
Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults to analog input mode. To configure any of
these port pins as a digital input, write a 0 to the port bit.
ADC0–ADC7 I Analog Inputs. Eight single-ended analog inputs. Channel selection is via ADCCON2 SFR.
T2 I
Timer 2 Digital Input. Input to Timer/Counter 2. When enabled, Counter 2 is incremented in response to a 1-to-0
transition of the T2 input.
T2EX I Digital Input. Capture/reload trigger for Counter 2; also functions as an up/down control input for Counter 2.
SS
I Slave Select Input for the SPI Interface.
SDATA I/O User Selectable, I
2
C Compatible, or SPI Data Input/Output Pin.
SCLOCK I/O Serial Clock Pin for I
2
C Compatible or for SPI Serial Interface Clock.
MOSI I/O SPI Master Output/Slave Input Data I/O Pin for SPI Interface.
MISO I/O SPI Master Input/Slave Output Data I/O Pin for SPI Serial Interface.
DAC0 O Voltage Output from DAC0. This pin is a no connect on the ADuC843.
DAC1 O Voltage Output from DAC1. This pin is a no connect on the ADuC843.
RESET I Digital Input. A high level on this pin for 24 master clock cycles while the oscillator is running resets the device.