Datasheet
ADuC841/ADuC842/ADuC843
Rev. 0 | Page 70 of 88
INTERRUPT SYSTEM
The ADuC841/ADuC842/ADuC843 provide a total of nine
interrupt sources with two priority levels. The control and
configuration of the interrupt system is carried out through
three interrupt-related SFRs:
IE Interrupt Enable Register
IP Interrupt Priority Register
IEIP2 Secondary Interrupt Enable Register
IE Interrupt Enable Register
SFR Address A8H
Power-On Default 00H
Bit Addressable Yes
Table 35. IE SFR Bit Designations
Bit No. Name Description
7 EA Set by the user to enable, or cleared to disable all interrupt sources.
6 EADC Set by the user to enable, or cleared to disable ADC interrupts.
5 ET2 Set by the user to enable, or cleared to disable Timer 2 interrupts.
4 ES Set by the user to enable, or cleared to disable UART serial port interrupts.
3 ET1 Set by the user to enable, or cleared to disable 0 Timer 1 interrupts.
2 EX1 Set by the user to enable, or cleared to disable External Interrupt 1.
1 ET0 Set by the user to enable, or cleared to disable Timer 0 interrupts.
0 EX0 Set by the user to enable, or cleared to disable External Interrupt 0 .
IP Interrupt Priority Register
SFR Address B8H
Power-On Default 00H
Bit Addressable Yes
Table 36. IP SFR Bit Designations
Bit No. Name Description
7 ---- Reserved.
6 PADC Written by the user to select the ADC interrupt priority (1 = High; 0 = Low).
5 PT2 Written by the user to select the Timer 2 interrupt priority (1 = High; 0 = Low).
4 PS Written by the user to select the UART serial port interrupt priority (1 = High; 0 = Low).
3 PT1 Written by the user to select the Timer 1 interrupt priority (1 = High; 0 = Low).
2 PX1 Written by the user to select External Interrupt 1 priority (1 = High; 0 = Low).
1 PT0 Written by the user to select the Timer 0 interrupt priority (1 = High; 0 = Low).
0 PX0 Written by the user to select External Interrupt 0 priority (1 = High; 0 = Low).