Datasheet

ADuC836
–76–
ADuC836
–77–
Parameter Min Typ Max Unit
SPI SLAVE MODE TIMING (CPHA = 1)
t
SS
SS to SCLOCK Edge 0 ns
t
SL
SCLOCK Low Pulsewidth 330 ns
t
SH
SCLOCK High Pulsewidth 330 ns
t
DAV
Data Output Valid after SCLOCK Edge 50 ns
t
DSU
Data Input Setup Time before SCLOCK Edge 100 ns
t
DHD
Data Input Hold Time after SCLOCK Edge 100 ns
t
DF
Data Output Fall Time 10 25 ns
t
DR
Data Output Rise Time 10 25 ns
t
SR
SCLOCK Rise Time 10 25 ns
t
SF
SCLOCK Fall Time 10 25 ns
t
SFS
SS High after SCLOCK Edge 0 ns
SCLOCK
(C
POL = 0)
SCLOCK
(CPOL = 1)
MISO
MOSI
SS
MSB IN
BITS 6–1
LSB IN
LSB
BITS 6–1
MSB
t
DHD
t
DSU
t
DF
t
DR
t
SL
t
SH
t
DAV
t
SR
t
SF
t
SFS
t
SS
Figure 77. SPI Slave Mode Timing (CPHA = 1)
REV. A
REV. A