Datasheet
REV. A–68–
ADuC834
Typical System Configuration
A typical ADuC834 configuration is shown in Figure 66. It
summarizes some of the hardware considerations discussed in
the previous paragraphs.
Figure 66 also includes connections for a typical analog measure-
ment application of the ADuC834, namely an interface to an
RTD (Resistive Temperature Device). The arrangement shown
is commonly referred to as a 4-wire RTD configuration.
Here, the on-chip excitation current sources are enabled to excite
the sensor. The excitation current flows directly through the
RTD generating a voltage across the RTD proportional to its
resistance. This differential voltage is routed directly to the positive
and negative inputs of the primary ADC (AIN1, AIN2 respec-
tively). The same current that excited the RTD also flows through
a series resistance R
REF
generating a ratiometric voltage reference
V
REF
. The ratiometric voltage reference ensures that variations
in the excitation current do not affect the measurement system as
the input voltage from the RTD and reference voltage across
R
REF
vary ratiometrically with the excitation current. Resistor
R
REF
must, however, have a low temperature coefficient to avoid
errors in the reference voltage over temperature. R
REF
must
also be large enough to generate at least a 1 V voltage reference.
C1+
V+
C1–
C2+
C2–
V–
T2OUT
R2IN
V
CC
GND
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
ADM3202
DV
DD
27
34
33
31
30
29
28
39
38
37
36
35
32
40
47
46
44
43
42
41
52
51
50
49
48
45
DV
DD
1k
DV
DD
1k
2-PIN HEADER FOR
EMULATION ACCESS
(NORMALLY OPEN)
DOWNLOAD/DEBUG
ENABLE JUMPER
(NORMALLY OPEN)
32.768kHz
DV
DD
1
2
3
4
5
6
7
8
9
AV
DD
200A/400A
EXCITATION
CURRENT
RTD
R
REF
5.6k
AV
DD
AGND
P1.2/I
EXC
1/DAC
REFIN–
REFIN+
P1.4/AIN1
P1.5/AIN2
DV
DD
DGND
PSEN
EA
DGND
DV
DD
XTAL2
XTAL1
RESET
RXD
TXD
DV
DD
DGND
NOT CONNECTED IN THIS EXAMPLE
ADuC834
P1.3/AIN5/DAC
DV
DD
RS-232 INTERFACE*
STANDARD D-TYPE
SERIAL COMMS
CONNECTOR TO
PC HOST
*EXTERNAL UART TRANSCEIVER INTEGRATED IN SYSTEM OR AS
PART OF AN EXTERNAL DONGLE AS DESCRIBED IN uC006.
ALL CAPACITORS IN THIS EXAMPLE ARE
0.1F CERAMIC CAPACITORS
Figure 66. Typical System Configuration