Datasheet

REV. A
ADuC834
–33–
Programming the Flash/EE Data Memory
A user wishes to program F3H into the second byte on Page 03H
of the Flash/EE data memory space while preserving the other
three bytes already in this page.
A typical program of the Flash/EE data array will involve:
1. setting EADRH/L with the page address
2. writing the data to be programmed to the EDATA1–4
3. writing the ECON SFR with the appropriate command
Step 1: Set Up the Page Address
The two address registers EADRH and EADRL hold the high
byte address and the low byte address of the page to be addressed.
The assembly language to set up the address may appear as:
MOV
EADRH,#0 ; Set Page Address Pointer
MOV
EADRL,#03H
Step 2: Set Up the EDATA Registers
The four values to be written into the page into the 4 SFRs
EDATA1–4. Unfortunately we do not know three of them. Thus it
is necessary to read the current page and overwrite the second byte.
MOV
ECON,#1 ; Read Page into EDATA1-4
MOV
EDATA2,#0F3H ; Overwrite byte 2
Step 3: Program Page
A byte in the Flash/EE array can only be programmed if it has
previously been erased. To be more specific, a byte can only be
programmed if it already holds the value FFH. Because of the
Flash/EE architecture, this erase must happen at a page level.
Therefore, a minimum of 4 bytes (1 page) will be erased when
an erase command is initiated. Once the page is erased, we can
program the 4 bytes in-page and then perform a verification of
the data.
MOV ECON,#5
; ERASE Page
MOV ECON,#2
; WRITE Page
MOV ECON,#4
; VERIFY Page
MOV A,ECON
; Check if ECON=0 (OK!)
JNZ ERROR
Note: although the 4 Kbytes of Flash/EE data memory is shipped
from the factory pre-erased, i.e., Byte locations set to FFH, it is
nonetheless good programming practice to include an erase-all
routine as part of any configuration/setup code running on the
ADuC834. An “ERASE-ALL” command consists of writing
“06H” to the ECON SFR, which initiates an erase of the 4-Kbyte
Flash/EE array. This command coded in 8051 assembly would
appear as:
MOV ECON,#06H ; Erase all Command
; 2 ms Duration
Flash/EE Memory Timing
Typical program and erase times for the ADuC834 are as follows:
Normal Mode (operating on Flash/EE data memory)
READPAGE (4 bytes) – 5 machine cycles
WRITEPAGE (4 bytes) – 380 s
VERIFYPAGE (4 bytes) – 5 machine cycles
ERASEPAGE (4 bytes) – 2 ms
ERASEALL (4 Kbytes) – 2 ms
READBYTE (1 byte) – 3 machine cycles
WRITEBYTE (1 byte) – 200 s
ULOAD Mode (operating on Flash/EE program memory)
WRITEPAGE (256 bytes) – 15 ms
ERASEPAGE (64 bytes) – 2 ms
ERASEALL (56 Kbytes) – 2 ms
WRITEBYTE (1 byte) – 200 s
It should be noted that a given mode of operation is initiated as
soon as the command word is written to the ECON SFR. The
core microcontroller operation on the ADuC834 is idled until
the requested Program/Read or Erase mode is completed.
In practice, this means that even though the Flash/EE memory
mode of operation is typically initiated with a two-machine cycle
MOV instruction (to write to the ECON SFR), the next instruction
will not be executed until the Flash/EE operation is complete.
This means that the core will not respond to interrupt requests
until the Flash/EE operation is complete, although the core
peripheral functions like Counter/Timers will continue to count
and time as configured throughout this period.