Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Explanation of Typical Performance Plots
- Memory Organization
- Special Function Registers (SFRs)
- Special Function Registers
- ADC Circuit Information
- Calibrating the ADC
- Initiating Calibration in Code
- Nonvolatile Flash/EE Memory
- Using the Flash/EE Data Memory
- User Interface to Other On-Chip ADuC832 Peripherals
- On-Chip PLL
- Pulse-Width Modulator (PWM)
- PWM Modes of Operation
- Serial Peripheral Interface
- I2C-Compatible Interface
- Dual Data Pointers
- Power Supply Monitor
- Watchdog Timer
- Time Interval Counter (TIC)
- 8052-Compatible On-Chip Peripherals
- Timer/Counter 0 And Timer/Counter 1 Operating Modes
- Timer/Counter 2
- UART Serial Interface
- SBUF
- SCON (UART Serial Port Control Register)
- Mode 0: 8-Bit Shift Register Mode
- Mode 1: 8-Bit UART, Variable Baud Rate
- Mode 2: 9-Bit UART with Fixed Baud Rate
- Mode 3: 9-Bit UART with Variable Baud Rate
- UART Serial Port Baud Rate Generation
- Timer 1 Generated Baud Rates
- Timer 2 Generated Baud Rates
- Timer 3 Generated Baud Rates
- Interrupt System
- ADuC832 Hardware Design Considerations
- Other Hardware Considerations
- Development Tools
- Outline Dimensions

Data Sheet ADuC832
Rev. B | Page 89 of 92
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-112-AC-1
SEATING
PLANE
VIEW A
2.45
MAX
1.03
0.88
0.73
TOP VIEW
(PINS DOWN)
1
39
40
13
14
27
26
52
PIN 1
14.15
13.90 SQ
13.65
7.80
REF
10.20
10.00 SQ
9.80
0.38
0.22
0.25
MIN
2.10
2.00
1.95
7°
0°
0.10
COPLANARITY
VIEW A
ROTATED 90° CCW
10°
6°
2°
0.23
0.11
0.65 BSC
LEAD PITCH
LEAD WIDTH
Figure 95. 52-Lead Metric Quad Flat Package [MQFP]
(S-52-2)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-220-VLLD-2
TOP VIEW
SIDE VIEW
1
56
14
15
43
42
28
29
0.50
0.40
0.30
0.30
0.23
0.18
0.20 REF
12° MAX
1.00
0.85
0.80
6.50 REF
SEATING
PLANE
0.60 MAX
0.60
MAX
COPLANARITY
0.08
0.05 MAX
0.02 NOM
0.25 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
PIN 1
INDICATOR
8.10
8.00 SQ
7.90
7.85
7.75 SQ
7.65
0.50
BSC
BOTTOM VIEW
EXPOSED
PAD
PIN 1
INDICATOR
06-07-2012-A
0.80 MAX
0.65 TYP
6.25
6.10 SQ
5.95
Figure 96. 56-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
8 mm × 8 mm Body, Very Thin Quad
(CP-56-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
ADuC832BCPZ −40°C to +85°C 56-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-56-1
ADuC832BCPZ-REEL −40°C to +85°C 56-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-56-1
ADuC832BSZ −40°C to +125°C 52-Lead Metric Quad Flat Pack age [MQFP] S-52-2
ADuC832BSZ-REEL
−40°C to +125°C
52-Lead Metric Quad Flat Pack age [MQFP]
S-52-2
EVAL-ADuC832QSZ QuickStart Development System
1
Z = RoHS Compliant Part.