Datasheet

Data Sheet ADuC832
Rev. B | Page 7 of 92
Parameter
1
V
DD
= 5 V V
DD
= 3 V Unit Test Conditions/Comments
DAC CHANNEL SPECIFICATIONS
12, 13
, INTERNAL BUFFER
DISABLED
DC Accuracy
10
Resolution 12 12 Bits
Relative Accuracy ±3 ±3 LSB typ
Differential Nonlinearity
11
−1 −1 LSB max Guaranteed 12-bit monotonic
±1/2 ±1/2 LSB typ
Offset Error
±5
±5
mV max
V
REF
range
Gain Error −0.3 −0.3 % typ V
REF
range
Gain Error Mismatch
4
0.5 0.5 % max % of full scale on DAC1
Analog outputs
Voltage Range 0 0 to V
REF
0 to V
REF
V typ DAC V
REF
= 2.5 V
REFERENCE INPUT/OUTPUT
Reference Output
14
Output Voltage (V
REF
) 2.5 2.5 V typ
Accuracy ±2.5 ±2.5 % max Of V
REF
measured at the C
REF
pin
Power Supply Rejection
47
47
dB typ
Reference Temperature Coefficient ±100 ±100 ppm/°C
typ
Internal V
REF
Power-On Time 80 80 ms typ
External Reference Input
15
V
REF
and C
REF
pins shorted
Voltage Range (V
REF
)
4
0.1 0.1 V min
V
DD
V
DD
V max
Input Impedance 20 20 kΩ typ
Input Leakage 1 1 μA max Internal band gap deselected via
ADCCON1[6]
POWER SUPPLY MONITOR (PSM)
DV
DD
Trip Point Selection Range 2.63 V min Four trip points selectable in this range
4.37 V max programmed via TPD1 and TPD0 in PSMCON
DV
DD
Power Supply Trip Point Accuracy ±3.5 % max
WATCHDOG TIMER (WDT)
4
Timeout Period 0 0 ms min Nine timeout periods
2000 2000 ms max Selectable in this range
FLASH/EE MEMORY RELIABILITY CHARACTERISTICS
16
Endurance
17
100,000 100,000 Cycles min
Data Retention
18
100 100 Years min
DIGITAL INPUTS
Input High Voltage (V
INH
)
4
2.4
2
V min
Input Low Voltage (V
INL
)
4
0.8 0.4 V max
Input Leakage Current (Port 0,
EA
)
±10 ±10 μA max V
IN
= 0 V or V
DD
±1 ±1 μA typ V
IN
= 0 V or V
DD
Logic 1 Input Current (All Digital Inputs)
±10 ±10 μA max V
IN
= V
DD
±1 ±1 μA typ V
IN
= V
DD
Logic 0 Input Current (Port 1, Port 2, and Port 3) −75 −25 μA max
−40 −15 μA typ V
IL
= 450 mV
Logic 1-to-Logic 0 Transition Current (Port 2, Port 3) −660 −250 μA max V
IL
= 2 V
−400 −140 μA typ V
IL
= 2 V