Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Explanation of Typical Performance Plots
- Memory Organization
- Special Function Registers (SFRs)
- Special Function Registers
- ADC Circuit Information
- Calibrating the ADC
- Initiating Calibration in Code
- Nonvolatile Flash/EE Memory
- Using the Flash/EE Data Memory
- User Interface to Other On-Chip ADuC832 Peripherals
- On-Chip PLL
- Pulse-Width Modulator (PWM)
- PWM Modes of Operation
- Serial Peripheral Interface
- I2C-Compatible Interface
- Dual Data Pointers
- Power Supply Monitor
- Watchdog Timer
- Time Interval Counter (TIC)
- 8052-Compatible On-Chip Peripherals
- Timer/Counter 0 And Timer/Counter 1 Operating Modes
- Timer/Counter 2
- UART Serial Interface
- SBUF
- SCON (UART Serial Port Control Register)
- Mode 0: 8-Bit Shift Register Mode
- Mode 1: 8-Bit UART, Variable Baud Rate
- Mode 2: 9-Bit UART with Fixed Baud Rate
- Mode 3: 9-Bit UART with Variable Baud Rate
- UART Serial Port Baud Rate Generation
- Timer 1 Generated Baud Rates
- Timer 2 Generated Baud Rates
- Timer 3 Generated Baud Rates
- Interrupt System
- ADuC832 Hardware Design Considerations
- Other Hardware Considerations
- Development Tools
- Outline Dimensions

ADuC832 Data Sheet
Rev. B | Page 32 of 92
EXTERNAL DATA MEMORY (EXTERNAL XRAM)
Similar to a standard 8051-compatible core, the ADuC832 can
access external data memory using a MOVX instruction. The
MOVX instruction automatically outputs the various control
strobes required to access the data memory.
The ADuC832, however, can access up to 16 MB of external
data memory. This is an enhancement of the 64 kB external data
memory space available on a standard 8051-compatible core.
The external data memory is discussed in more detail in the
ADuC832 Hardware Design Considerations section.
INTERNAL XRAM
There are 2 kB of on-chip data memory on the ADuC832. This
memory, although on chip, is also accessed via the MOVX instruc-
tion. The 2 kB of internal XRAM are mapped into the bottom
2 kB of the external address space if CFG832[0] is set. Otherwise,
access to the external data memory occurs similar to a standard
8051. When using the internal XRAM, Port 0 and Port 2 are
free to be used as general-purpose I/Os.
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG832[0] = 0
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG832[0] = 1
0007FFH
000800H
2 kB
ON-CHIP
XRAM
02987-023
Figure 34. Internal and External XRAM