Datasheet

Data Sheet ADuC832
Rev. B | Page 19 of 92
Table 11. SPI Slave Mode Timing (CPHA = 0)
Parameter
1
Description Min Typ Max Unit
t
SS
SS to SCLOCK edge
0 ns
t
SL
SCLOCK low pulse width 330 ns
t
SH
SCLOCK high pulse width 330 ns
t
DAV
Data output valid after SCLOCK edge 50 ns
t
DSU
Data input setup time before SCLOCK edge 100 ns
t
DHD
Data input hold time after SCLOCK edge 100 ns
t
DF
Data output fall time 10 25 ns
t
DR
Data output rise time 10 25 ns
t
SR
SCLOCK rise time 10 25 ns
t
SF
SCLOCK fall time
10
25
ns
t
DOSS
Data output valid after
SS edge
20 ns
t
SFS
SS high after SCLOCK edge
0 ns
1
See Figure 13.
t
DAV
t
SFS
t
SH
t
SL
t
SR
t
DF
t
DR
t
DSU
t
DHD
t
SS
t
DOSS
MSB LSB
BIT 6 TO BIT 1
LSB IN
MSB IN
t
SF
BIT 6 TO BIT 1
02987-096
MISO (O)
MOSI (I)
SCLOCK (I)
(CPOL = 1)
SCLOCK (I)
(CPOL = 0)
SS (I)
Figure 13. SPI Slave Mode Timing (CPHA = 0)