Datasheet

REV. 0–60–
ADuC831
Interrupt Priority
The Interrupt Enable registers are written by the user to enable
individual interrupt sources, while the Interrupt Priority registers
allow the user to select one of two priority levels for each interrupt.
An interrupt of a high priority may interrupt the service routine
of a low priority interrupt, and if two interrupts of different
priority occur at the same time, the higher level interrupt will be
serviced first. An interrupt cannot be interrupted by another
interrupt of the same priority level. If two interrupts of the same
priority level occur simultaneously, a polling sequence is observed
as shown in Table XXXI.
Table XXXI. Priority within an Interrupt Level
Source Priority Description
PSMI 1 (Highest) Power Supply Monitor Interrupt
WDS 2 Watchdog Timer Interrupt
IE0 2 External Interrupt 0
ADCI 3 ADC Interrupt
TF0 4 Timer/Counter 0 Interrupt
IE1 5 External Interrupt 1
TF1 6 Timer/Counter 1 Interrupt
I2CI + ISPI 7 SPI Interrupt
RI + TI 8 Serial Interrupt
TF2 + EXF2 9 (Lowest) Timer/Counter 2 Interrupt
TII 11 (Lowest) Time Interval Counter Interrupt
Interrupt Vectors
When an interrupt occurs, the program counter is pushed onto
the stack and the corresponding interrupt vector address is
loaded into the program counter. The Interrupt Vector Addresses
are shown in Table XXXII.
Table XXXII. Interrupt Vector Addresses
Source Vector Address
IE0 0003H
TF0 000BH
IE1 0013H
TF1 001BH
RI + TI 0023H
TF2 + EXF2 002BH
ADCI 0033H
I2CI + ISPI 003BH
PSMI 0043H
TII 0053H
WDS 005BH
ADuC831 HARDWARE DESIGN CONSIDERATIONS
This section outlines some of the key hardware design consider-
ations that must be addressed when integrating the ADuC831
into any hardware system.
Clock Oscillator
The clock source for the ADuC831 can come either from an
external source or from the internal clock oscillator. To use the
internal clock oscillator, connect a parallel resonant crystal between
XTAL1 and XTAL2, and connect a capacitor from each pin to
ground as shown below.
XTAL2
XTAL1
TO INTERNAL
TIMNG CIRCUITS
ADuC831
Figure 55. External Parallel Resonant Crystal Connections
XTAL2
XTAL1
TO INTERNAL
TIMNG CIRCUITS
ADuC831
EXTERNAL
CLOCK
SOURCE
Figure 56. Connecting an External Clock Source
Whether using the internal oscillator or an external clock
source, the ADuC831’s specified operational clock speed range is
400 kHz to 16 MHz. The core itself is static, and will function
all the way down to dc. But at clock speeds slower that 400 kHz
the ADC will no longer function correctly. Therefore, to ensure
specified operation, use a clock frequency of at least 400 kHz
and no more than 16 MHz. Note: the Flash/EE memory may
not program correctly at a clock frequency of less than 2 MHz.
External Memory Interface
In addition to its internal program and data memories, the ADuC831
can access up to 64 kBytes of external program memory (ROM/
PROM/etc.) and up to 16 MBytes of external data memory (SRAM).
To select from which code space (internal or external program
memory) to begin executing instructions, tie the EA (external
access) pin high or low, respectively. When EA is high (pulled up
to V
DD
), user program execution will start at address 0 of the
internal 62 kBytes Flash/EE code space. When EA is low (tied
to ground) user program execution will start at address 0 of the
external code space.
A second very important function of the EA pin is described
in the Single Pin Emulation Mode section.
External program memory (if used) must be connected to the
ADuC831 as illustrated in Figure 57. Note that 16 I/O lines