Datasheet

REV. 0
ADuC831
–29–
USING THE FLASH/EE DATA MEMORY
The 4 kBytes of Flash/EE data memory is configured as 1024
pages, each of four bytes. As with the other ADuC831 peripherals,
the interface to this memory space is via a group of registers mapped
in the SFR space. A group of four data registers (EDATA1–4)
are used to hold the four bytes of data at each page. The page is
addressed via the two registers EADRH and EADRL. Finally,
ECON is an 8-bit control register that may be written with one
of nine Flash/EE memory access commands to trigger various
read, write, erase, and verify functions.
A block diagram of the SFR interface to the Flash/EE data
memory array is shown in Figure 20.
ECON—Flash/EE Memory Control SFR
Programming of either the Flash/EE data memory or the Flash/EE
program memory is done through the Flash/EE memory control
SFR (ECON). This SFR allows the user to read, write, erase, or
verify the 4 kBytes of Flash/EE data memory or the 56 kBytes of
Flash/EE program memory.
BYTE 1
(0000H)
EDATA1 SFR
BYTE 1
(0004H)
BYTE 1
(0008H)
BYTE 1
(000CH)
BYTE 1
(0FF8H)
BYTE 1
(0FFCH)
BYTE 2
(0001H)
EDATA2 SFR
BYTE 2
(0005H)
BYTE 2
(0009H)
BYTE 2
(000DH)
BYTE 2
(0FF9H)
BYTE 2
(0FFDH)
BYTE 3
(0002H)
EDATA3 SFR
BYTE 3
(0006H)
BYTE 3
(000AH)
BYTE 3
(000EH)
BYTE 3
(0FFAH)
BYTE 3
(0FFEH)
BYTE 4
(0003H)
EDATA4 SFR
BYTE 4
(0007H)
BYTE 4
(000BH)
BYTE 4
(000FH)
BYTE 4
(0FFBH)
BYTE 4
(0FFFH)
01H
00H
02H
03H
3FEH
3FFH
PAGE ADDRESS
(EADRH/L)
BYTE
ADDRESSES
ARE GIVEN IN
BRACKETS
Figure 20. Flash/EE Data Memory Control and Configuration
Table VII. ECON—Flash/EE Memory Commands
COMMAND DESCRIPTION COMMAND DESCRIPTION
ECON VALUE (NORMAL MODE) (Power-On Default) (ULOAD MODE)
01H Results in 4 bytes in the Flash/EE data memory, Not Implemented. Use the MOVC instruction.
READ addressed by the page address EADRH/L, being read
into EDATA1–4.
02H
Results in four bytes in EDATA 1–4 being written to Results in bytes 0-255 of internal XRAM being written
WRITE
the Flash/EE data memory, at the page address given by to the 256 bytes of Flash/EE program memory at the
EADRH/L (0 ≤ EADRH/L < 0400H. page address given by EADRH. (0 ≤ EADRH < E0H)
Note: The four bytes in the page being addressed must Note: The 256 bytes in the page being addressed must
be pre-erased. be pre-erased.
03H Reserved Command Reserved Command
04H Verifies if the data in EDATA1–4 is contained in the Not Implemented. Use the MOVC and MOVX
VERIFY page address given by EADRH/L. A subsequent read instructions to verify the WRITE in software.
of the ECON SFR will result in a 0 being read if the
verification is valid, or a nonzero value being read to
indicate an invalid verification.
05H Results in the Erase of the 4-byte page of Flash/EE data Results in the 64-byte page of Flash/EE program
ERASE PAGE memory addressed by the page address EADRH/L. memory, addressed by the byte address EADRH/L
being erased. EADRL can equal any of 64 locations
within the page. A new page starts whenever EADRL
is equal to 00H, 40H, 80H, or C0H.
06H Results in the erase of entire 4 kBytes of Flash/EE Results in the Erase of the entire 56 kBytes of ULOAD
ERASE ALL data memory. Flash/EE program memory.
81H Results in the byte in the Flash/EE data memory, Not Implemented. Use the MOVC command.
READBYTE addressed by the byte address EADRH/L, being read
into EDATA1. (0 ≤ EADRH/L ≤ 0FFFH).
82H Results in the byte in EDATA1 being written into Results in the byte in EDATA1 being written into
WRITEBYTE Flash/EE data memory, at the byte address EADRH/L. Flash/EE program memory, at the byte address
EADRH/L (0 ≤ EADRH/L ≤ DFFFH).
0FH Leaves the ECON instructions to operate on the Enters NORMAL mode directing subsequent ECON
EXULOAD Flash/EE data memory. instructions to operate on the Flash/EE data memory.
F0H Enters ULOAD mode, directing subsequent ECON Leaves the ECON instructions to operate on the
ULOAD instructions to operate on the Flash/EE program memory. Flash/EE program memory.