Datasheet

REV. B
ADuC824
–2–
TABLE OF CONTENTS
FEATURES .......................................................................... 1
GENERAL DESCRIPTION ................................................. 1
SPECIFICATIONS .............................................................. 3
TIMING SPECIFICATIONS .............................................. 8
ABSOLUTE MAXIMUM RATINGS................................. 18
PIN CONFIGURATION .................................................... 18
ORDERING GUIDE .......................................................... 18
PIN FUNCTION DESCRIPTIONS................................... 19
ADuC824 BLOCK DIAGRAM .......................................... 21
MEMORY ORGANIZATION ............................................ 22
OVERVIEW OF MCU-RELATED SFRS ........................... 23
Accumulator (ACC) ........................................................ 23
B SFR (B) ....................................................................... 23
Stack Pointer (SP) ........................................................... 23
Data Pointer (DPTR) ...................................................... 23
Program Status Word (PSW) ........................................... 23
Power Control (PCON) ................................................... 23
SPECIAL FUNCTION REGISTERS ................................. 24
SFR INTERFACE TO THE PRIMARY AND
AUXILIARY ADCs ......................................................... 25
ADCSTAT ...................................................................... 25
ADCMODE .................................................................... 26
ADC0CON ..................................................................... 27
ADC1CON ..................................................................... 28
SF ................................................................................... 28
ICON .............................................................................. 29
ADC0H/ADC0M/ADC0L ............................................... 29
ADC1H/ADC1L ............................................................. 29
OF0H/OF0M/OF0L ........................................................ 30
OF1H/OF1L ................................................................... 30
GN0H/GN0M/GN0L ...................................................... 30
GN1H/GN1L .................................................................. 30
PRIMARY AND AUXILIARY ADC DESCRIPTION........ 31
Overview ......................................................................... 31
Primary ADC .................................................................. 31
Auxiliary ADC ................................................................. 32
PRIMARY AND AUXILIARY ADC NOISE
PERFORMANCE ............................................................ 33
Analog Input Channels .................................................... 33
Primary and Auxiliary ADC Inputs .................................. 33
Analog Input Ranges ........................................................ 33
Programmable Gain Amplifier .......................................... 34
Bipolar/Unipolar Inputs ................................................... 34
Burnout Currents............................................................. 34
Excitation Currents .......................................................... 35
Reference Input ............................................................... 35
Reference Detect ............................................................. 35
Sigma-Delta Modulator ................................................... 35
Digital Filter .................................................................... 35
ADC Chopping ............................................................... 36
Calibration ...................................................................... 37
NONVOLATILE FLASH/EE MEMORY ........................... 37
Flash/EE Memory Overview ............................................. 37
Flash/EE Memory and the ADuC824 ............................... 37
ADuC824 Flash/EE Memory Reliability ........................... 37
Using the Flash/EE Program Memory .............................. 38
Flash/EE Program Memory Security ................................ 39
Using the Flash/EE Data Memory .................................... 39
USER INTERFACE TO OTHER ON-CHIP ADuC824
PERIPHERALS .............................................................. 41
DAC ................................................................................ 41
On-Chip PLL .................................................................. 42
Time Interval Counter (TIC) ........................................... 43
Watchdog Timer .............................................................. 46
Power Supply Monitor ..................................................... 47
Serial Peripheral Interface ................................................ 48
I
2
C-Compatible Interface ................................................. 50
8051-COMPATIBLE ON-CHIP PERIPHERALS .............. 51
Parallel I/O Ports 0–3 ....................................................... 51
Timers/Counters .............................................................. 51
TIMER/COUNTER 0 AND 1 OPERATING MODES ...... 54
UART Serial Interface ..................................................... 57
Interrupt System .............................................................. 60
ADuC824 HARDWARE DESIGN CONSIDERATIONS... 62
Clock Oscillator ............................................................... 62
External Memory Interface............................................... 62
Power-On Reset Operation .............................................. 63
Power Supplies ................................................................ 63
Power Consumption ........................................................ 64
Power-Saving Modes ....................................................... 64
Grounding and Board Layout Recommendations ............. 64
ADuC824 System Self-Identification................................ 65
OTHER HARDWARE CONSIDERATIONS..................... 65
In-Circuit Serial Download Access ................................... 65
Embedded Serial Port Debugger ...................................... 65
Single-Pin Emulation Mode ............................................. 65
Enhanced-Hooks Emulation Mode .................................. 66
Typical System Configuration .......................................... 66
QUICKSTART DEVELOPMENT SYSTEM..................... 67
OUTLINE DIMENSIONS ................................................. 68
Revision History .................................................................. 68