Datasheet

REV. 0
ADuC816
–13–
Parameter Min Max Unit Figure
I
2
C-COMPATIBLE INTERFACE TIMING
t
L
SCLOCK Low Pulsewidth 4.7 μs7
t
H
SCLOCK High Pulsewidth 4.0 μs7
t
SHD
Start Condition Hold Time 0.6 μs7
t
DSU
Data Setup Time 100 μs7
t
DHD
Data Hold Time 0.9 μs7
t
RSU
Setup Time for Repeated Start 0.6 μs7
t
PSU
Stop Condition Setup Time 0.6 μs7
t
BUF
Bus Free Time between a STOP 1.3 μs7
Condition and a START Condition
t
R
Rise Time of Both SCLOCK and SDATA 300 ns 7
t
F
Fall Time of Both SCLOCK and SDATA 300 ns 7
t
SUP
* Pulsewidth of Spike Suppressed 50 ns 7
*Input filtering on both the SCLOCK and SDATA inputs suppresses noise spikes less than 50 ns.
SDATA (I/O)
STOP
CONDITION
ACK MSB
SCLK (I)
t
PSU
t
SHD
t
DSU
t
DHD
t
SUP
t
H
t
DSU
t
DHD
t
RSU
t
F
t
R
t
F
t
R
t
L
t
BUF
START
CONDITION
t
SUP
LSB
MSB
1 2-7
8
PS
9
S(R)
REPEATED
START
1
Figure 7. I
2
C-Compatible Interface Timing
REV. A