Datasheet
ADuC814
Rev. A | Page 7 of 72
Parameter V
DD
= 5 V V
DD
= 3 V Unit Test Conditions
Oscillator Powered Down
16
OSC_PD = 1 in PLLCON SFR
Wake-Up with
I
NT0
Interrupt
150 400 ms typ
Wake-Up with SPI/I
2
C Interrupt 150 400 ms typ
Wake-Up with External RESET 150 400 ms typ
After External RESET in Normal Mode 3 3 ms typ
After WDT Reset in Normal Mode 3 3 ms typ Controlled via WDCON SFR
FLASH/EE MEMORY RELIABILITY
CHARACTERISTICS
17
Endurance
18
100,000 100,000 Cycles min
Data Retention
19
100 100 Years min
POWER REQUIREMENTS
20, 21
Power Supply Voltages
AV
DD
/DV
DD
– AGND 2.7 V min AV
DD
/DV
DD
= 3 V nom
3.3 V max
4.5 V min AV
DD
/DV
DD
= 5 V nom
5.5 V max
Power Supply Currents, Normal Mode
D
VDD
Current
14
5 2.5 mA max Core CLK = 2.097 MHz
4 2 mA typ (CD bits in PLLCON = 3)
A
VDD
Current
14
1.7 1.7 mA max
D
VDD
Current 20 10 mA max Core CLK = 16.78MHz (max)
16 8 mA typ (CD bits in PLLCON = 0)
A
VDD
Current 1.7 1.7 mA max
D
VDD
Current
14
3.5 1.5 mA max Core CLK = 131.2 kHz (min)
2.8 1.2 mA typ (CD bits in PLLCON = 7)
A
VDD
Current 1.7 1.7 mA max
Power Supply Currents, Idle Mode
D
VDD
Current
14
1.7 1.2 mA max Core CLK = 2.097 MHz
1.5 1 mA typ (CD Bits in PLLCON = 3)
AV
DD
Current
14
0.15 0.15 mA max
DV
DD
Current
14
6 3 mA max Core CLK = 16.78 MHz (max)
4 2.5 mA typ (CD bits in PLLCON = 0)
AV
DD
Current
14
0.15 0.15 mA max
DV
DD
Current
14
1.25 1 mA max Core CLK = 131 kHz (min)
1.1 0.7 mA typ (CD bits in PLLCON = 7)
AV
DD
Current
14
0.15 0.15 mA max
Power Supply Currents, Power-Down
Mode
Core CLK = 2.097 MHz or 16.78 MHz (CD bits in
PLLCON = 3 or 0)
DV
DD
Current
14
20 µA max Oscillator on
40 14 µA typ
AV
DD
Current 1 1 µA typ
DV
DD
Current 15 µA max Oscillator off
20 10 µA typ
AV
DD
Current 1 1 µA typ
Typical Additional Power Supply
Currents
Core CLK = 2.097 MHz, (CD bits in PLLCON = 3)
AV
DD
= DV
DD
= 5 V
PSM Peripheral 50 µA typ
ADC 1.5 mA typ
DAC 150 µA typ